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  1. 14 Aug, 2020 5 commits
    • Yann Gautier's avatar
      stm32mp1: use newly introduced GICv2 makefile · 33c91baf
      Yann Gautier authored 
      

Include the GICv2 makefile in STM32MP1 SP_min makefile, and use
${GICV2_SOURCES} instead of taking drivers/arm/gic files directly.

Change-Id: Ibcaed5b0bd17f6d8cf200e208c11cc10cd6d2ee5
Signed-off-by: default avatarYann Gautier <yann.gautier@st.com>
      33c91baf
    • Ruari Phipps's avatar
      SPM: Add owner field to cactus secure partitions · ad86d35a
      Ruari Phipps authored 
      

For supporting dualroot CoT for Secure Partitions a new optional field
"owner" is introduced which will be used to sign the SP with
corresponding signing domain. To demonstrate its usage, this patch adds
owners to cactus Secure Partitions.
Signed-off-by: default avatarRuari Phipps <ruari.phipps@arm.com>
Change-Id: I7b760580355fc92edf5402cecc38c38125dc1cae
      ad86d35a
    • Manish Pandey's avatar
      plat/arm: enable support for Plat owned SPs · 990d972f
      Manish Pandey authored 
      

For Arm platforms SPs are loaded by parsing tb_fw_config.dts and
adding them to SP structure sequentially, which in-turn is appended to
loadable image list.

With recently introduced dualroot CoT for SPs where they are owned
either by SiP or by Platform. SiP owned SPs index starts at SP_PKG1_ID
and Plat owned SPs index starts at SP_PKG5_ID. As the start index of SP
depends on the owner, there should be a mechanism to parse owner of a SP
and put it at the correct index in SP structure.

This patch adds support for parsing a new optional field "owner" and
based on it put SP details(UUID & Load-address) at the correct index in
SP structure.

Change-Id: Ibd255b60d5c45023cc7fdb10971bef6626cb560b
Signed-off-by: default avatarManish Pandey <manish.pandey2@arm.com>
      990d972f
    • Jimmy Brisson's avatar
      Use true instead of 1 in while · 92069086
      Jimmy Brisson authored 
      

This resolves MISRA defects such as:

    plat/common/plat_bl1_common.c:63:[MISRA C-2012 Rule 14.4 (required)]
    The condition expression "1" does not have an essentially boolean type.

Change-Id: I679411980ad661191fbc834a44a5eca5494fd0e2
Signed-off-by: default avatarJimmy Brisson <jimmy.brisson@arm.com>
      92069086
    • Jimmy Brisson's avatar
      Prevent colliding identifiers · d74c6b83
      Jimmy Brisson authored 
      

There was a collision between the name of the typedef in the CASSERT and
something else, so we make the name of the typedef unique to the
invocation of DEFFINE_SVC_UUID2 by appending the name that's passed into
the macro. This eliminates the following MISRA violation:

    bl1/bl1_main.c:233:[MISRA C-2012 Rule 5.6 (required)] Identifier
    "invalid_svc_uuid" is already used to represent a typedef.

This also resolves MISRA rule 5.9.

These renamings are as follows:
  * tzram -> secram. This matches the function call name as it has
  sec_mem in it's  name
  * fw_config_base -> config_base. This file does not mess with
  hw_conig, so there's little chance of confusion

Change-Id: I8734ba0956140c8e29b89d0596d10d61a6ef351e
Signed-off-by: default avatarJimmy Brisson <jimmy.brisson@arm.com>
      d74c6b83
  3. 13 Aug, 2020 1 commit
  5. 10 Aug, 2020 2 commits
    • Alexei Fedorov's avatar
      plat/arm: Reduce size of BL31 binary · fa1fdb22
      Alexei Fedorov authored 
      

BL31 binary size is aligned to 4KB because of the
code in include\plat\arm\common\arm_reclaim_init.ld.S:
    __INIT_CODE_UNALIGNED__ = .;
    . = ALIGN(PAGE_SIZE);
    __INIT_CODE_END__ = .;
with all the zero data after the last instruction of
BL31 code to the end of the page.
This causes increase in size of BL31 binary stored in FIP
and its loading time by BL2.
This patch reduces the size of BL31 image by moving
page alignment from __INIT_CODE_END__ to __STACKS_END__
which also increases the stack size for secondary CPUs.

Change-Id: Ie2ec503fc774c22c12ec506d74fd3ef2b0b183a9
Signed-off-by: default avatarAlexei Fedorov <Alexei.Fedorov@arm.com>
      fa1fdb22
    • Saurabh Gorecha's avatar
      sc7180 platform support · 5bd9c17d
      Saurabh Gorecha authored 
      

Adding support for QTI CHIP SC7180 on ATF

Change-Id: I0d82d3a378036003fbd0bc4784f61464bb76ea82
Signed-off-by: default avatarSaurabh Gorecha <sgorecha@codeaurora.org>
Co-authored-by: default avatarMaulik Shah <mkshah@codeaurora.org>
      5bd9c17d
  7. 06 Aug, 2020 1 commit
  9. 04 Aug, 2020 1 commit
    • Grant Likely's avatar
      Use abspath to dereference $BUILD_BASE · 29214e95
      Grant Likely authored 
      

If the user tries to change BUILD_BASE to put the build products outside
the build tree the compile will fail due to hard coded assumptions that
$BUILD_BASE is a relative path. Fix by using $(abspath $(BUILD_BASE))
to rationalize to an absolute path every time and remove the relative
path assumptions.

This patch also adds documentation that BUILD_BASE can be specified by
the user.
Signed-off-by: default avatarGrant Likely <grant.likely@arm.com>
Signed-off-by: default avatarManish Pandey <manish.pandey2@arm.com>
Change-Id: Ib1af874de658484aaffc672f30029b852d2489c8
      29214e95
  11. 31 Jul, 2020 4 commits
  13. 30 Jul, 2020 10 commits
  15. 26 Jul, 2020 3 commits
  17. 24 Jul, 2020 2 commits
  19. 23 Jul, 2020 5 commits
  21. 22 Jul, 2020 2 commits
    • Alexei Fedorov's avatar
      plat/arm/board/fvp: Add support for Measured Boot · 4a135bc3
      Alexei Fedorov authored 
      

This patch adds support for Measured Boot functionality
to FVP platform code. It also defines new properties
in 'tpm_event_log' node to store Event Log address and
it size
'tpm_event_log_sm_addr'
'tpm_event_log_addr'
'tpm_event_log_size'
in 'event_log.dtsi' included in 'fvp_tsp_fw_config.dts'
and 'fvp_nt_fw_config.dts'. The node and its properties
are described in binding document
'docs\components\measured_boot\event_log.rst'.

Change-Id: I087e1423afcb269d6cfe79c1af9c348931991292
Signed-off-by: default avatarAlexei Fedorov <Alexei.Fedorov@arm.com>
      4a135bc3
    • Peng Fan's avatar
      plat: imx: common: implement IMX_SIP_AARCH32 · 4a0ac3e3
      Peng Fan authored 
      

Implement IMX_SIP_AARCH32 to let AArch64 Bootloader could issue
SIP call to switch to AArch32 mode to run OS.
Signed-off-by: default avatarPeng Fan <peng.fan@nxp.com>
Change-Id: I38b04ef909a6dbfba5ded12a7bb6e799a3935a66
      4a0ac3e3
  23. 21 Jul, 2020 4 commits