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Add USDHC driver to support boot EMMC. Only initialization
and single/multiple block read are tested.

[bod: fixed checkpatch.pl complaints]
[bod: changed name to imx_usdhc for namespace consistency]
[bod: squashed antecedent fixes into this one patch]
Signed-off-by: Jun Nie <jun.nie@linaro.org>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>

Add delay timer API so that it can be called by delay timer
layer and used as delay timer globally.

[bod: changed name from imx_delay_timer -> imx_gpt ]
Signed-off-by: Jun Nie <jun.nie@linaro.org>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>

This patch does two main things

- It implements the crash console UART init in assembly, as a
  hard-coded 115200 8N1 assumed from the 24 MHz clock.

  If the clock setup code has not run yet, this code can't work but,
  setting up clocks and clock-gates is way out of scope for this type of
  recovery function.

- It adds code to write a character out of the NXP UART without using any
  stack-based operations when doing so.

- Provides support for crash console in DCE or DTE mode.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>

- Adds a simple register read/write abstraction to cut-down on the
  amount of typing and text required to access UART registers in this driver.

- Adds a console getc() callback.

- Adds a console putc() callback, translating '\n' to '\r' + '\n'.

- Initializes the MXC UART, take a crude method of calculating the
  BAUD rate generator. The UART clock-gates must have been enabled prior
  to launching the UART init code.
  Special care needs to be taken to ensure the UBIR is initialized before the
  UBMR and we need to ensure that UCR2.SRST comes good before trying to
  program other registers associated with the UART.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>