- 04 Dec, 2018 4 commits
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Christine Gharzuzi authored
- Update CPU frequency on AP807 to 2GHz for SAR 0x0. - Increase AVS to 0.88V for 2GHz clock Change-Id: Ic945b682ab2f8543e34294bfc56c3eae2c5e0c8e Signed-off-by: Christine Gharzuzi <chrisg@marvell.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
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Igal Liberman authored
In Armada 8K DB boards, PCIe initialization can be executed only once because PCIe reset performed during chip power on and it cannot be executed via GPIO later. This means that power on can be executed only once, when it's called from the bootloader. Power on: Read bit 21 of the mode, it marks if the caller is the bootloader or the Linux Kernel. Power off: Check if the comphy was already configured to PCIe, if yes, check if the caller is bootloader, if both conditions are true (PCIe mode and called by Linux) - skip the power-off. In addition, fix incorrect documentation describing mode fields - PCIe width is 3 bits, not 2. NOTE: with this patch, please use LK4.14.76 (LK4.4.120 may not work with it). Change-Id: I4b929011f97a0a1869a51ba378687e78b3eca4ff Signed-off-by: Igal Liberman <igall@marvell.com> Reviewed-by: Grzegorz Jaszczyk <jaz@semihalf.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
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Grzegorz Jaszczyk authored
Extended phy selector configuration about XFI1 mode. Change-Id: I1309770bbb5fdbfb0127b6f12ee78974d1d6b19f Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
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Peng Fan authored
Add tzc380 support. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Bai Ping <ping.bai@nxp.com>
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- 26 Nov, 2018 1 commit
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Haojian Zhuang authored
EXT_CSD command needs to access data from eMMC device. Add the operation of polling eMMC device status. Make sure the command is finished. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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- 23 Nov, 2018 1 commit
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Pankaj Gupta authored
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
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- 21 Nov, 2018 1 commit
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Vijayenthiran Subramaniam authored
ARM CoreLink DMC-620 Dynamic Memory Controller includes a TZC controller to setup secure or non-secure regions of DRAM memory. The TZC controller allows to setup upto eight such regions of memory in DRAM. This driver provides helper functions to setup the TZC controller within DMC-620. Change-Id: Iee7692417c2080052bdb7b1c2873a024bc5d1d10 Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
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- 15 Nov, 2018 4 commits
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Konstantin Porotchkin authored
Migrate Marvell platforms from legacy console API to multi-console API. Change-Id: I647f5f49148b463a257a747af05b5f0c967f267c Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
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Yann Gautier authored
Now that MULTI_CONSOLE_API is enabled for the STM32MP1 platform, we can remove the non MULTI_CONSOLE_API parts in the driver. Signed-off-by: Yann Gautier <yann.gautier@st.com>
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Yann Gautier authored
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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Yann Gautier authored
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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- 12 Nov, 2018 1 commit
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Alexei Colin authored
Signed-off-by: Alexei Colin <acolin@isi.edu>
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- 09 Nov, 2018 2 commits
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Yann Gautier authored
These issues wer found by sparse: drivers/st/clk/stm32mp1_clk.c:1524:19: warning: incorrect type in assignment (different base types) expected restricted fdt32_t const [usertype] *pkcs_cell got unsigned int const [usertype] * plat/st/stm32mp1/plat_image_load.c:13:6: warning: symbol 'plat_flush_next_bl_params' was not declared. Should it be static? plat/st/stm32mp1/plat_image_load.c:21:16: warning: symbol 'plat_get_bl_image_load_info' was not declared. Should it be static? plat/st/stm32mp1/plat_image_load.c:29:13: warning: symbol 'plat_get_next_bl_params' was not declared. Should it be static? plat/st/stm32mp1/bl2_io_storage.c:40:10: warning: symbol 'block_buffer' was not declared. Should it be static? Signed-off-by: Yann Gautier <yann.gautier@st.com>
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Yann Gautier authored
cppcheck: [drivers/partition/gpt.c:19] -> [drivers/partition/gpt.c:19]: (warning) Either the condition 'str_in!=((void*)0)' is redundant or there is possible null pointer dereference: name. sparse: drivers/partition/gpt.c:39:9: warning: Using plain integer as NULL pointer Signed-off-by: Yann Gautier <yann.gautier@st.com>
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- 08 Nov, 2018 1 commit
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Antonio Nino Diaz authored
All identifiers, regardless of use, that start with two underscores are reserved. This means they can't be used in header guards. The style that this project is now to use the full name of the file in capital letters followed by 'H'. For example, for a file called "uart_example.h", the header guard is UART_EXAMPLE_H. The exceptions are files that are imported from other projects: - CryptoCell driver - dt-bindings folders - zlib headers Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 06 Nov, 2018 2 commits
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Sandrine Bailleux authored
This function was needed at the time where we didn't have the compiler_rt lib. An AArch32-specific variant was provided to handle the 64-bit shift operation in 32-bit. This is no longer needed. Change-Id: Ibab709a95e3a723ae2eeaddf873dba70ff2012b3 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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ldts authored
Target builds but has not been tested. Signed-off-by: ldts <jorge.ramirez.ortiz@gmail.com>
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- 29 Oct, 2018 1 commit
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Antonio Nino Diaz authored
It isn't possible to build this driver without adding this define. Change-Id: Iba2ced411cd8ce438787871fa01b414d32b9aa42 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 26 Oct, 2018 1 commit
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Antonio Nino Diaz authored
It has only been tested with a system clock of 24 MHz. It has only been implemented for the multi console API. Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 23 Oct, 2018 1 commit
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Antonio Nino Diaz authored
The definitions FAIL_CONTROL_*_SHIFT were incorrect, they have been fixed. The types tzc_region_attributes_t and tzc_action_t have been removed and replaced by unsigned int because it is not allowed to do logical operations on enums. Also, fix some address definitions in arm_def.h. Change-Id: Id37941d76883f9fe5045a5f0a4224c133c504d8b Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 22 Oct, 2018 2 commits
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Konstantin Porotchkin authored
Introduce driver for Marvell Armada-37xx UART console Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
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Konstantin Porotchkin authored
Add support for Marvell Armada-3700 COMPHY driver Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
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- 20 Oct, 2018 1 commit
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Andre Przywara authored
The "Reduced Serial Bus" is an Allwinner specific bus, bearing many similarities with I2C. It sports a much higher bus frequency, though, (typically 3 MHz) and requires much less handholding for the typical task of manipulating slave registers (fire-and-forget). On most A64 boards this bus is used to connect the PMIC to the SoC. This driver provides basic primitives to read and write slave registers, it will be later used by the PMIC code. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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- 19 Oct, 2018 1 commit
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Soby Mathew authored
The `finish_console_register` macro is used by the multi console framework to register the `console_t` driver callbacks. It relied on weak references to the `ldr` instruction to populate 0 to the callback in case the driver has not defined the appropriate function. Use of `ldr` instruction to load absolute address to a reference makes the binary position dependant. These instructions should be replaced with adrp/adr instruction for position independant executable(PIE). But adrp/adr instructions don't work well with weak references as described in GNU ld bugzilla issue 22589. This patch defines a new version of `finish_console_register` macro which can spcify which driver callbacks are valid and deprecates the old one. If any of the argument is not specified, then the macro populates 0 for that callback. Hence the functionality of the previous deprecated macro is preserved. The USE_FINISH_CONSOLE_REG_2 define is used to select the new variant of the macro and will be removed once the deprecated variant is removed. All the upstream console drivers have been migrated to use the new macro in this patch. NOTE: Platforms be aware that the new variant of the `finish_console_register` should be used and the old variant is deprecated. Change-Id: Ia6a67aaf2aa3ba93932992d683587bbd0ad25259 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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- 18 Oct, 2018 1 commit
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Grzegorz Jaszczyk authored
Some of COMPHY parameters depends on the hw connection between the SoC and the PHY, which can vary on different boards e.g. due to different wires length. Define the "porting layer" with some defaults parameters. It ease updating static values which needs to be updated due to board differences, which are now grouped in one place. Example porting layer for a8k-db is under: plat/marvell/a8k/a80x0/board/phy-porting-layer.h If for some boards parameters are not defined (missing phy-porting-layer.h), the default values are used (drivers/marvell/comphy/phy-default-porting-layer.h) and the following compilation warning is show: "Using default comphy params - you may need to suit them to your board". The common COMPHY driver code is extracted in order to be shared with future COMPHY driver for A3700 SoC platforms Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Signed-off-by: Igal Liberman <igall@marvell.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
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- 17 Oct, 2018 15 commits
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Jorge Ramirez-Ortiz authored
Signed-off-by: ldts <jramirez@baylibre.com>
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Jorge Ramirez-Ortiz authored
Signed-off-by: ldts <jramirez@baylibre.com>
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Jorge Ramirez-Ortiz authored
Signed-off-by: ldts <jramirez@baylibre.com>
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Jorge Ramirez-Ortiz authored
Signed-off-by: ldts <jramirez@baylibre.com>
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Jorge Ramirez-Ortiz authored
Signed-off-by: ldts <jramirez@baylibre.com>
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Jorge Ramirez-Ortiz authored
Signed-off-by: ldts <jramirez@baylibre.com>
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Jorge Ramirez-Ortiz authored
Signed-off-by: ldts <jramirez@baylibre.com>
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Jorge Ramirez-Ortiz authored
Signed-off-by: ldts <jramirez@baylibre.com>
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Jorge Ramirez-Ortiz authored
Signed-off-by: ldts <jramirez@baylibre.com>
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Jorge Ramirez-Ortiz authored
Signed-off-by: ldts <jramirez@baylibre.com>
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Jorge Ramirez-Ortiz authored
Signed-off-by: ldts <jramirez@baylibre.com>
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Jorge Ramirez-Ortiz authored
Signed-off-by: ldts <jramirez@baylibre.com>
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Jorge Ramirez-Ortiz authored
Signed-off-by: ldts <jramirez@baylibre.com>
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Jorge Ramirez-Ortiz authored
Signed-off-by: ldts <jramirez@baylibre.com>
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Jorge Ramirez-Ortiz authored
Signed-off-by: ldts <jramirez@baylibre.com>
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