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Various changes to comply with MISRA static analysis rules
Signed-off-by: Jolly Shah <jollys@xilinx.com>

Add pin control APIs which driver can use to query
pin information from firmware. Using these APIs,
driver do not need to maintain hard-coded pin database.

Major changes in patch are:
- Add pin database with pins, functions and function groups
  information
- Implement APIs for pin information queries
- Update pin control APIs for get/set functions to use new
  pin control database. Remove pin database which was added
  earlier.
Signed-off-by: Rajan Vaja <rajanv@xilinx.com>
Signed-off-by: Jolly Shah <jollys@xilinx.com>

These are empty functions with no logic right now. Code
will be added in subsequent commits.
Signed-off-by: Rajan Vaja <rajanv@xilinx.com>
Signed-off-by: Jolly Shah <jollys@xilinx.com>

Implement ioctl APIs which uses MMIO operations
to control RPU operations. Below IOCTLs are supported
in this patch:
  * Get RPU operation mode
  * Set RPU operation mode
  * Configure RPU boot address (OCM/TCM)
  * Configure TCM combined mode
Signed-off-by: Rajan Vaja <rajanv@xilinx.com>
Signed-off-by: Jolly Shah <jollys@xilinx.com>

Implement pin control APIs which uses MMIO operations
to set/get values of configuration parameters.
Signed-off-by: Rajan Vaja <rajanv@xilinx.com>
Signed-off-by: Jolly Shah <jollys@xilinx.com>

Implement pin control APIs which uses MMIO operations
to set/get functions for the given pin.
Signed-off-by: Rajan Vaja <rajanv@xilinx.com>
Signed-off-by: Jolly Shah <jollys@xilinx.com>

Add wrappers for pin control APIs. Actual implementation of
these APIs would be done in subsequent changes.
Signed-off-by: Rajan Vaja <rajanv@xilinx.com>
Signed-off-by: Jolly Shah <jollys@xilinx.com>

Use zynqmp_ipi APIs to access IPI registers in pm_service.
As the zynqmp_ipi APIs doesn't cover IPI buffers, the pm_ipi
in pm_service will still directly access the IPI buffers.
Signed-off-by: Wendy Liang <jliang@xilinx.com>

This fix modifies the order of system includes to meet the ARM TF coding
standard. There are some exceptions to this change in order to retain
header groupings and where there are headers within #if statements.

Change-Id: Ib5b668c992d817cc860e97b29e16ef106d17e404
Signed-off-by: Isla Mitchell <isla.mitchell@arm.com>

To make software license auditing simpler, use SPDX[0] license
identifiers instead of duplicating the license text in every file.

NOTE: Files that have been imported by FreeBSD have not been modified.

[0]: https://spdx.org/



Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761a
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>

The callback IRQ is delivered to the NS OS. Provide an interface to
allow the NS OS to obtain the callback data from the secure HW.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>

The IPI hardware is secure and managed by ATF, nevertheless we deliver
the IRQ to the rich OS. The IRQ is needed to receive PM callbacks.
Enable the IPI interrupt when the rich OS probes the API version.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>

Use the PMUFW get_chipid call to obtain IDCODE and version register.

Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>

Allow reading more than just a single value from the message buffer.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>

We must guarantee that writes have become effective before returning to
the caller. Hence, wait for PMUFW signaling completion of the FW call
before returning to the rich OS.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>

This patch adds pm_fpga_load() and pm_fpga_get_status() API's to provide
the Access to the xilfpga library to load the bitstream into zynqmp
PL region.
Signed-off-by: Nava kishore Manne <navam@xilinx.com>

During system suspend, identify slaves which are configured
as wake sources and call pm_set_wakeup_source API for each of them.

Identifying if device may wake the system is done by checking if any
interrupt of that device is enabled in GICD_ISENABLER when the APU is
about to enter SUSPEND_TO_RAM state. If such interrupt is found,
pm_set_wakeup_source is called with corresponding PM node ID as
argument.
Signed-off-by: Filip Drazic <filip.drazic@aggios.com>

The state argument of the pm_self_suspend API encodes the state to
which the APU intends to suspend. The state can be:
- PM_APU_STATE_CPU_IDLE - processor power down, all memories remain
  on
- PM_APU_STATE_SUSPEND_TO_RAM - all processors powered down, L2$
  powered down, all OCM banks in retention and DDR in
  self-refresh.
The calls for setting requirements for L2$ and OCM banks are now
redundant and removed.
Signed-off-by: Filip Drazic <filip.drazic@aggios.com>
[ sb
 - remove redundant #defines
]
Signed-off-by: Sören Brinkmann <soren.brinkmann@xilinx.com>

Signed-off-by: Anes Hadziahmetagic <anes.hadziahmetagic@aggios.com>
Signed-off-by: Filip Drazic <filip.drazic@aggios.com>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>

Signed-off-by: Anes Hadziahmetagic <anes.hadziahmetagic@aggios.com>
Signed-off-by: Filip Drazic <filip.drazic@aggios.com>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>

Functions pm_ipi_send and pm_ipi_send_sync are declared in pm_ipi.h
Signed-off-by: Filip Drazic <filip.drazic@aggios.com>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>

The Xilinx Zynq UltraScale+ MPSOC containes a quad A53 cluster. This
patch adds the platform port for that SoC.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>