- 13 Jul, 2020 1 commit
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Manish Pandey authored
while mapping SPMC manifest page in the SPMD translation regime the mapped size was resolved to zero if SPMC manifest base address is PAGE aligned, causing SPMD to abort. To fix the problem change mapped size to PAGE_SIZE if manifest base is PAGE aligned. Signed-off-by: Manish Pandey <manish.pandey2@arm.com> Change-Id: I06cd39dbefaf492682d9bbb0c82b950dd31fb416
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- 31 May, 2020 1 commit
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Alexei Fedorov authored
The patch fixes BL31 linker script error "Init code ends past the end of the stacks" for platforms with number of CPUs less than 4, which is caused by __STACKS_END__ address being lower than __INIT_CODE_END__. The modified BL31 linker script detects such cases and increases the total amount of stack memory, setting __STACKS_END__ = __INIT_CODE_END__, and CPUs' stacks are calculated by BL31 'plat_get_my_stack' function accordingly. For platforms with more than 4 CPUs and __INIT_CODE_END__ < __STACKS_END__ stack memory does not increase and allocated CPUs' stacks match the existing implementation. The patch removes exclusion of PSCI initialization functions from the reclaimed .init section in 'arm_reclaim_init.ld.S' script, which increases the size of reclaimed memory region. Change-Id: I927773e00dd84e1ffe72f9ee534f4f2fc7b6153c Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
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- 25 May, 2020 1 commit
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J-Alves authored
SPCI is renamed as PSA FF-A which stands for Platform Security Architecture Firmware Framework for A class processors. This patch replaces the occurrence of SPCI with PSA FF-A(in documents) or simply FFA(in code). Change-Id: I4ab10adb9ffeef1ff784641dfafd99f515133760 Signed-off-by: J-Alves <joao.alves@arm.com>
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- 19 May, 2020 1 commit
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johpow01 authored
This patch enables the v8.6 extension to add a delay before WFE traps are taken. A weak hook plat_arm_set_twedel_scr_el3 has been added in plat/common/aarch64/plat_common.c that disables this feature by default but platform-specific code can override it when needed. The only hook provided sets the TWED fields in SCR_EL3, there are similar fields in HCR_EL2, SCTLR_EL2, and SCTLR_EL1 to control WFE trap delays in lower ELs but these should be configured by code running at EL2 and/or EL1 depending on the platform configuration and is outside the scope of TF-A. Signed-off-by: John Powell <john.powell@arm.com> Change-Id: I0a9bb814205efeab693a3d0a0623e62144abba2d
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- 13 May, 2020 2 commits
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Olivier Deprez authored
Currently BL2 passes TOS_FW_CONFIG address and size through registers to BL31. This corresponds to SPMC manifest load address and size. The SPMC manifest is mapped in BL31 by dynamic mapping. This patch removes BL2 changes from generic code (which were enclosed by SPD=spmd) and retrieves SPMC manifest size directly from within SPMD. The SPMC manifest load address is still passed through a register by generic code. Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Change-Id: I35c5abd95c616ae25677302f0b1d0c45c51c042f
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Olivier Deprez authored
As a follow-up to bdd2596d , and related to SPM Dispatcher EL3 component and SPM Core S-EL2/S-EL1 component: update with cosmetic and coding rules changes. In addition: -Add Armv8.4-SecEL2 arch detection helper. -Add an SPMC context (on current core) get helper. -Return more meaningful error return codes. -Remove complexity in few spmd_smc_handler switch-cases. -Remove unused defines and structures from spmd_private.h Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Change-Id: I99e642450b0dafb19d3218a2f0e2d3107e8ca3fe
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- 29 Apr, 2020 1 commit
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Andre Przywara authored
Our fdtw_read_cells() implementation goes to great lengths to sanity-check every parameter and result, but leaves a big hole open: The size of the storage the value pointer points at needs to match the number of cells given. This can't be easily checked at compile time, since we lose the size information by using a void pointer. Regardless the current usage of this function is somewhat wrong anyways, since we use it on single-element, fixed-length properties only, for which the DT binding specifies the size. Typically we use those functions dealing with a number of cells in DT context to deal with *dynamically* sized properties, which depend on other properties (#size-cells, #clock-cells, ...), to specify the number of cells needed. Another problem with the current implementation is the use of ambiguously sized types (uintptr_t, size_t) together with a certain expectation about their size. In general there is no relation between the length of a DT property and the bitness of the code that parses the DTB: AArch64 code could encounter 32-bit addresses (where the physical address space is limited to 4GB [1]), while AArch32 code could read 64-bit sized properties (/memory nodes on LPAE systems, [2]). To make this more clear, fix the potential issues and also align more with other DT users (Linux and U-Boot), introduce functions to explicitly read uint32 and uint64 properties. As the other DT consumers, we do this based on the generic "read array" function. Convert all users to use either of those two new functions, and make sure we never use a pointer to anything other than uint32_t or uint64_t variables directly. This reveals (and fixes) a bug in plat_spmd_manifest.c, where we write 4 bytes into a uint16_t variable (passed via a void pointer). Also we change the implementation of the function to better align with other libfdt users, by using the right types (fdt32_t) and common variable names (*prop, prop_names). [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi#n874 [2] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm/boot/dts/ecx-2000.dts Change-Id: I718de960515117ac7a3331a1b177d2ec224a3890 Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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- 27 Mar, 2020 1 commit
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Zelalem authored
On DynamIQ CPU FVPs, stats test cases are failing when hardware-assisted coherency is enabled due to a corrupt timestamp value. Investigation of the issue indicates that on these models the timestamp value is stored in cache instead of memory. This patch flushes the dcache when the timestamp is stored to make sure it is stored in memory. Change-Id: I05cd54ba5991a5a96dd07f1e08b5212273201411 Signed-off-by: Zelalem <zelalem.aweke@arm.com>
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- 17 Mar, 2020 1 commit
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Manish V Badarkhe authored
Implemented SMCCC_ARCH_SOC_ID call in order to get below SOC information: 1. SOC revision 2. SOC version Implementation done using below SMCCC specification document: https://developer.arm.com/docs/den0028/c Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com> Change-Id: Ie0595f1c345a6429a6fb4a7f05534a0ca9c9a48b
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- 12 Mar, 2020 1 commit
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Max Shvetsov authored
This patch introduces the `SPCI_ID_GET` interface which will return the ID of the calling SPCI component. Returns 0 for requests from the non-secure world and the SPCI component ID as specified in the manifest for secure world requests. Change-Id: Icf81eb1d0e1d7d5c521571e04972b6e2d356e0d1 Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com> Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
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- 06 Mar, 2020 2 commits
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Alexei Fedorov authored
This patch provides a fix for incorrect crash dump data for lower EL when TF-A is built with HANDLE_EA_EL3_FIRST=1 option which enables routing of External Aborts and SErrors to EL3. Change-Id: I9d5e6775e6aad21db5b78362da6c3a3d897df977 Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
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Sumit Garg authored
TBBR spec advocates for optional encryption of firmwares (see optional requirement: R060_TBBR_FUNCTION). So add an IO abstaction layer to support firmware decryption that can be stacked above any underlying IO/ packaging layer like FIP etc. It aims to provide a framework to load any encrypted IO payload. Also, add plat_get_enc_key_info() to be implemented in a platform specific manner as handling of encryption key may vary from one platform to another. Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Change-Id: I9892e0ddf00ebecb8981301dbfa41ea23e078b03
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- 03 Mar, 2020 1 commit
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Max Shvetsov authored
Added SPMD_SPM_AT_SEL2 build command line parameter. Set to 1 to run SPM at S-EL2. Set to 0 to run SPM at S-EL1 (pre-v8.4 or S-EL2 is disabled). Removed runtime EL from SPM core manifest. Change-Id: Icb4f5ea4c800f266880db1d410d63fe27a1171c0 Signed-off-by: Artsem Artsemenka <artsem.artsemenka@arm.com> Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com>
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- 20 Feb, 2020 1 commit
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Varun Wadekar authored
This patch moves the MHZ_TICKS_PER_SEC macro to utils_def.h for other platforms to use. Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Change-Id: I6c4dc733f548d73cfdb3515ec9ad89a9efaf4407
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- 10 Feb, 2020 1 commit
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Achin Gupta authored
This patch repurposes the TOS FW configuration file as the manifest for the SPM core component which will reside at the secure EL adjacent to EL3. The SPM dispatcher component will use the manifest to determine how the core component must be initialised. Routines and data structure to parse the manifest have also been added. Signed-off-by: Achin Gupta <achin.gupta@arm.com> Signed-off-by: Artsem Artsemenka <artsem.artsemenka@arm.com> Change-Id: Id94f8ece43b4e05609f0a1d364708a912f6203cb
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- 04 Feb, 2020 1 commit
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Zelalem authored
This patch removes unnecessary header file includes discovered by Coverity HFA option. Change-Id: I2827c37c1c24866c87db0e206e681900545925d4 Signed-off-by: Zelalem <zelalem.aweke@arm.com>
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- 10 Jan, 2020 1 commit
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Deepika Bhavnani authored
NOTE for platform integrators: API `plat_psci_stat_get_residency()` third argument `last_cpu_idx` is changed from "signed int" to the "unsigned int" type. Issue / Trouble points 1. cpu_idx is used as mix of `unsigned int` and `signed int` in code with typecasting at some places leading to coverity issues. 2. Underlying platform API's return cpu_idx as `unsigned int` and comparison is performed with platform specific defines `PLAFORM_xxx` which is not consistent Misra Rule 10.4: The value of a complex expression of integer type may only be cast to a type that is narrower and of the same signedness as the underlying type of the expression. Based on above points, cpu_idx is kept as `unsigned int` to match the API's and low-level functions and platform defines are updated where ever required Signed-off-by: Deepika Bhavnani <deepika.bhavnani@arm.com> Change-Id: Ib26fd16e420c35527204b126b9b91e8babcc3a5c
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- 09 Jan, 2020 1 commit
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Madhukar Pappireddy authored
In further patches, we aim to enable -Wredundant-decls by default. This rearragement of helper macros is necessary to make Coverity tool happy as well as making sure there are no redundant function declarations for PMF related declarations. Also, PMF related macros were added to provide appropriate function declarations for helper APIs which capture PSCI statistics. Change-Id: I36273032dde8fa079ef71235ed3a4629c5bfd981 Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
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- 20 Dec, 2019 1 commit
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Paul Beesley authored
The Secure Partition Manager (SPM) prototype implementation is being removed. This is preparatory work for putting in place a dispatcher component that, in turn, enables partition managers at S-EL2 / S-EL1. This patch removes: - The core service files (std_svc/spm) - The Resource Descriptor headers (include/services) - SPRT protocol support and service definitions - SPCI protocol support and service definitions Change-Id: Iaade6f6422eaf9a71187b1e2a4dffd7fb8766426 Signed-off-by: Paul Beesley <paul.beesley@arm.com> Signed-off-by: Artsem Artsemenka <artsem.artsemenka@arm.com>
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- 11 Sep, 2019 1 commit
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Justin Chadwell authored
This patch adds support for the Undefined Behaviour sanitizer. There are two types of support offered - minimalistic trapping support which essentially immediately crashes on undefined behaviour and full support with full debug messages. The full support relies on ubsan.c which has been adapted from code used by OPTEE. Change-Id: I417c810f4fc43dcb56db6a6a555bfd0b38440727 Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
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- 19 Aug, 2019 1 commit
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Masahiro Yamada authored
Currently, console drivers prepend '\r' to '\n' by themselves. This is common enough to be supported in the framework. Add a new flag, CONSOLE_FLAG_TRANSLATE_CRLF. A driver can set this flag to ask the framework to transform LF into CRLF instead of doing it by itself. Change-Id: I4f5c5887591bc0a8749a105abe62b6562eaf503b Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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- 01 Aug, 2019 1 commit
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Julius Werner authored
NOTE: AARCH32/AARCH64 macros are now deprecated in favor of __aarch64__. All common C compilers pre-define the same macros to signal which architecture the code is being compiled for: __arm__ for AArch32 (or earlier versions) and __aarch64__ for AArch64. There's no need for TF-A to define its own custom macros for this. In order to unify code with the export headers (which use __aarch64__ to avoid another dependency), let's deprecate the AARCH32 and AARCH64 macros and switch the code base over to the pre-defined standard macro. (Since it is somewhat unintuitive that __arm__ only means AArch32, let's standardize on only using __aarch64__.) Change-Id: Ic77de4b052297d77f38fc95f95f65a8ee70cf200 Signed-off-by: Julius Werner <jwerner@chromium.org>
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- 28 Jun, 2019 1 commit
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Ambroise Vincent authored
The new API becomes the default one. Change-Id: Ic1d602da3dff4f4ebbcc158b885295c902a24fec Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
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- 03 Apr, 2019 1 commit
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Ambroise Vincent authored
The default implementations are defined in crash_console_helpers.S. The platforms have to define plat_crash_console_*. Implemented placeholders for platforms that were missing helpers. Change-Id: Iea60b6f851956916e421dfd8c34a62d96eb9148e Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
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- 01 Apr, 2019 1 commit
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Ambroise Vincent authored
Improved support for W=1 compilation flag by solving missing-prototypes and old-style-definition warnings. The libraries are compiling with warnings (which turn into errors with the Werror flag). Outside of libraries, some warnings cannot be fixed without heavy structural changes. Change-Id: I1668cf99123ac4195c2a6a1d48945f7a64c67f16 Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
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- 28 Feb, 2019 2 commits
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John Tsichritzis authored
Due to the shared Mbed TLS heap optimisation introduced in 6d01a463 , common code files were depending on Mbed TLS specific headers. This dependency is now removed by moving the default, unoptimised heap implementation inside the Mbed TLS specific files. Change-Id: I11ea3eb4474f0d9b6cb79a2afd73a51a4a9b8994 Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
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Antonio Nino Diaz authored
Fix some typos and clarify some sentences. Change-Id: Id276d1ced9a991b4eddc5c47ad9a825e6b29ef74 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 07 Feb, 2019 1 commit
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Varun Wadekar authored
This patch removes the unused functions that are marked as .global in code but not defined anywhere in the code. Change-Id: Ia5057a77c0b0b4a61043eab868734cd3437304cc Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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- 04 Jan, 2019 1 commit
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Antonio Nino Diaz authored
Enforce full include path for includes. Deprecate old paths. The following folders inside include/lib have been left unchanged: - include/lib/cpus/${ARCH} - include/lib/el3_runtime/${ARCH} The reason for this change is that having a global namespace for includes isn't a good idea. It defeats one of the advantages of having folders and it introduces problems that are sometimes subtle (because you may not know the header you are actually including if there are two of them). For example, this patch had to be created because two headers were called the same way: e0ea0928 ("Fix gpio includes of mt8173 platform to avoid collision."). More recently, this patch has had similar problems: 46f9b2c3 ("drivers: add tzc380 support"). This problem was introduced in commit 4ecca339 ("Move include and source files to logical locations"). At that time, there weren't too many headers so it wasn't a real issue. However, time has shown that this creates problems. Platforms that want to preserve the way they include headers may add the removed paths to PLAT_INCLUDES, but this is discouraged. Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 11 Dec, 2018 1 commit
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Antonio Nino Diaz authored
Load SP and RD from package instead of relying on RD being already loaded in memory and the SP being loaded as a BL32 image. Change-Id: I18d4fbf4597656c6a7e878e1d7c01a8a324f3f8a Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 10 Dec, 2018 2 commits
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Yann Gautier authored
This avoids the following warnings: no previous prototype for 'bl2_arch_setup' [-Wmissing-prototypes] no previous prototype for 'plat_log_get_prefix' [-Wmissing-prototypes] Also correct a compilation issue if BL2_IN_XIP_MEM is enabled: uintptr_t is not defined. Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Signed-off-by: Yann Gautier <yann.gautier@st.com>
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Antonio Nino Diaz authored
Introduce helpers to create resource description struct, as well as code to load the information from DTB files. Change-Id: I0f5bb94eb8b01c6cb53fe807a9db0c05a70d7a43 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 07 Dec, 2018 2 commits
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Julius Werner authored
Crash reporting via the default consoles registered by MULTI_CONSOLE_API has been broken since commit d35cc347 (Console: Use callee-saved registers), which was introduced to allow console drivers written in C. It's not really possible with the current crash reporting framework to support console drivers in C, however we should make sure that the existing assembly drivers that do support crash reporting continue to work through the MULTI_CONSOLE_API. This patch fixes the problem by creating custom console_putc() and console_flush() implementations for the crash reporting case that do not use the stack. Platforms that want to use this feature will have to link plat/common/aarch64/crash_console_helpers.S explicitly. Also update the documentation to better reflect the new reality (of this being an option rather than the expected default for most platforms). Change-Id: Id0c761e5e2fddaf25c277bc7b8ab603946ca73cb Signed-off-by: Julius Werner <jwerner@chromium.org>
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Julius Werner authored
Commit e74afb65 (Deprecate weak crash console functions) deprecated the default inclusion of weak definitions for plat_crash_console functions in plat/common/aarch64/platform_helpers.S. The code was later copied out to plat/common/aarch64/crash_console_helpers.S so platforms can link it explicitly if they want to. However, since deprecation does not mean removal, the same code is also still duplicated in platform_helpers.S. The duplicated code contains both empty stubs for the !MULTI_CONSOLE_API case, and a real implementation that used to work but was broken by commit d35cc347 (Console: Use callee-saved registers) for MULTI_CONSOLE_API. It's not great to have both of these duplicated in two files, so this patch splits them up: in platform_helpers.S we'll only keep the empty stubs (guarded by !ERROR_DEPRECATED), which should not regress functionality since the MULTI_CONSOLE_API implementation was already broken anyway. In crash_console_helpers.S, we'll only keep the MULTI_CONSOLE_API version, which is enough both as an implementation in itself and as a sample for how to reimplement these functions in a platform-specific file. Change-Id: I83d95a90ab6aac597dc2ea2f2797ac2c8ed075d4 Signed-off-by: Julius Werner <jwerner@chromium.org>
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- 26 Oct, 2018 2 commits
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Roberto Vargas authored
This function is not related to Arm platforms and can be reused by other platforms if needed. Change-Id: Ia9c328ce57ce7e917b825a9e09a42b0abb1a53e8 Co-authored-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
There are several platforms using arm_setup_page_tables(), which is supposed to be Arm platform only. This creates several dependency problems between platforms. This patch adds the definition XLAT_TABLES_LIB_V2 to the xlat tables lib v2 makefile. This way it is possible to detect from C code which version is being used and include the correct header. The file arm_xlat_tables.h has been renamed to xlat_tables_compat.h and moved to a common folder. This way, when in doubt, this header can be used to guarantee compatibility, as it includes the correct header based on XLAT_TABLES_LIB_V2. This patch also removes the usage of ARM_XLAT_TABLES_V1 from QEMU (so that is now locked in xlat lib v2) and ZynqMP (where it was added as a workaround). Change-Id: Ie1e22a23b44c549603d1402a237a70d0120d3e04 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 25 Oct, 2018 2 commits
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Antonio Nino Diaz authored
The default behaviour of the plat_crash_console_xxx functions isn't obvious to someone that hasn't read all the documentation. As they are not mandatory, it is unlikely that the code will be checked when doing a platform port, which may mean that some platforms may not have crash console support at all. The idea of this patch is to force platform maintainers to decide how the crash console has to behave so that the final behaviour isn't unexpected. Change-Id: I40b2a7b56c5530c1dcd63eace5bd37ae6335056e Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Platforms that wish to use the sample functions have to add the file to their Makefile. It is not included by default. Change-Id: I713617bb58dc218967199248f68da86241d7ec40 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 28 Sep, 2018 2 commits
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Antonio Nino Diaz authored
Change-Id: Icd1cdd42afdc78895a9be6c46b414b0a155cfa63 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Change-Id: I8ec8b4439ca1d7606aae069c2c576a9a8b18c92c Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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