- 24 Jul, 2018 2 commits
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Yann Gautier authored
STM32MP1 is a microprocessor designed by STMicroelectronics, based on a dual Arm Cortex-A7. It is an Armv7-A platform, using dedicated code from TF-A. STM32MP1 uses BL2 compiled with BL2_AT_EL3. Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Mathieu Belou <mathieu.belou@st.com> Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Pascal Paillet <p.paillet@st.com>
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Sumit Garg authored
OP-TEE loading is optional on Developerbox controlled via SCP firmware. To check if OP-TEE is loaded or not, we use DRAM1 region info passed by SCP firmware. Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Reviewed-by: Daniel Thompson <daniel.thompson@linaro.org>
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- 22 Jul, 2018 1 commit
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Haojian Zhuang authored
BL1 is used in recovery mode on HiKey. The TBB implementation on HiKey is in BL2. It means that user need to build ATF BL2 with TBB and ATF BL1 with non-TBB. It's inconvenient. So include TBB in BL1, too. Signed-off-by: Teddy Reed <teddy@prosauce.org> Signed-off-by: Victor Chong <victor.chong@linaro.org> Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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- 19 Jul, 2018 3 commits
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Jeenu Viswambharan authored
External Aborts while executing in EL3 is fatal in nature. This patch allows for the platform to define a handler for External Aborts received while executing in EL3. A default implementation is added which falls back to platform unhandled exception. Change-Id: I466f2c8113a33870f2c7d2d8f2bf20437d9fd354 Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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Jeenu Viswambharan authored
Double fault is when the PE receives another error whilst one is being handled. To detect double fault condition, a per-CPU flag is introduced to track the status of error handling. The flag is checked/modified while temporarily masking external aborts on the PE. This patch routes double faults to a separate platform-defined handler. Change-Id: I70e9b7ba4c817273c55a0af978d9755ff32cc702 Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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Jeenu Viswambharan authored
Uncontainable errors are the most severe form of errors, which typically mean that the system state can't be trusted any more. This further means that normal error recovery process can't be followed, and an orderly shutdown of the system is often desirable. This patch allows for the platform to define a handler for Uncontainable errors received. Due to the nature of Uncontainable error, the handler is expected to initiate an orderly shutdown of the system, and therefore is not expected to return. A default implementation is added which falls back to platform unhandled exception. Also fix ras_arch.h header guards. Change-Id: I072e336a391a0b382e77e627eb9e40729d488b55 Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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- 18 Jul, 2018 3 commits
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Konstantin Porotchkin authored
Add support for A8K platform boards Change-Id: Ife025d930d2ab6cabbc13bbe19b2273cc1c938c8 Signed-off-by: Hanna Hawa <hannah@marvell.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
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Konstantin Porotchkin authored
Add common Marvell ARMADA platform components. This patch also includes common components for Marvell ARMADA 8K platforms. Change-Id: I42192fdc6525a42e46b3ac2ad63c83db9bcbfeaf Signed-off-by: Hanna Hawa <hannah@marvell.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
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Antonio Nino Diaz authored
Define the values as unsigned int or unsigned long long based on the actual size of the register. This prevents subtle issues caused by having a type that is too small. For example: #define OPTION_ENABLE 0x3 #define OPTION_SHIFT 32 uint64_t mask = OPTION_ENABLE << OPTION_SHIFT; Because OPTION_ENABLE fits in an int, the value is considered an int. This means that, after shifting it 32 places to the left, the final result is 0. The correct way to define the values is: #define OPTION_ENABLE ULL(0x3) #define OPTION_SHIFT U(32) In this case, the compiler is forced to use a 64 bit value from the start, so shifting it 32 places to the left results in the expected value. Change-Id: Ieaf2ffc2d8caa48c622db011f2aef549e713e019 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 16 Jul, 2018 7 commits
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Antonio Nino Diaz authored
The Non-secure DRAM region shouldn't be protected in the range specified in the Linux command line with memmap. This change also increases the size of the Secure DRAM region. Change-Id: I306e9e443a84b834c99739f54a534a3ca3be2424 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
This option allows the Trusted Firmware to pass the correct arguments to a 32 or 64-bit Linux kernel without the need of an intermediate loader such as U-Boot. Change-Id: I2b22e8933fad6a614588ace559f893e97329801f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
FIQs shouldn't be used at all as long as the interrupt routing doesn't support them properly. Change-Id: Ib1db7b523a62de2035d41197bc791048337cf791 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Remove unused variable and set the secure entrypoint correctly. Change-Id: I7447ea62771092de6be35704077ae28c519d6993 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
It uses the hardware RNG in a similar way as Juno (it gets 128 bits of entropy and does xor on them). It is disabled by default. Change-Id: I8b3adb61f5a5623716e0e8b6799404c68dd94c60 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Note that this is a non-secure RNG. This is only useful for educational purposes. Change-Id: If359c8d0f755ef8e416986de7fbca34679a523e1 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
There is no way to boot BL31 at the addresses specified in the platform memory map unless an extra loader is used at address 0x00000000. It is better to remove it to prevent confusion. Having it enabled was a bug. Change-Id: I3229fbc080f5996cff47efce8e799bae94e0d5cb Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 14 Jul, 2018 2 commits
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Antonio Nino Diaz authored
Implement VideoCore mailbox interface driver and use it to get the board revision identifier. For now it is only used to print the model for debug purposes. This wiki contains the documentation of the mailbox interface: https://github.com/raspberrypi/firmware/wiki Change-Id: I11943b99b52cc1409f4a195ebe58eb44ae5b1d6c Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
This implementation doesn't actually turn the system off, it simply reboots it and prevents it from booting while keeping it in a low power mode. Change-Id: I7f72c9f43f25ba0341db052bc2be4774c88a7ea3 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 13 Jul, 2018 2 commits
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Antonio Nino Diaz authored
Add a new default makefile target to concatenate BL1 and the FIP and generate armstub8.bin. This way it isn't needed to do it manually. Documentation updated to reflect the changes. Change-Id: Id5b5b1b7b9f87767db63fd01180ddfea855a7207 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Sandrine Bailleux authored
With commit cf24229e ("Run compiler on debug macros for type checking"), the compiler will now always evaluate INFO() macro calls, no matter the LOG_LEVEL value. Therefore, any variable referenced in the macro has to be be defined. Address this issue by removing the local variable and using the expression it was assigned directly in the INFO() call. Change-Id: Iedc23b3538c1e162372e85390881e50718e50bf3 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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- 12 Jul, 2018 11 commits
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Dimitris Papastamos authored
Change-Id: Iaebbeac1a1d6fbd531e5694b95ed068b7a193e62 Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>
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Dimitris Papastamos authored
Change-Id: If07000b6b19011e960336a305a784dd643301b97 Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>
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Anson Huang authored
Add domain suspend/resume support, Linux kernel can "echo mem > /sys/power/state" to put system into suspend mode, all CPUs and cluster will be powered off and can be waked up if irq pending in GIC, tested on i.MX8QM MEK board. Since the power state has been implemented, switch to use standard power state for CCI operations instead of private cpu use count in i.MX8QM. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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Anson Huang authored
Add domain off support for Linux kernel's cpu hot-plug feature, when there are cpu off request from Linux kernel, TF-A will send command to system controller to do CPU power gate accordingly, tested on i.MX8QM MEK board. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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Anson Huang authored
Add system reset support for i.MX8QM, when Linux kernel issues "reboot" command, TF-A will send command to inform system controller to reset whole board according to board design, tested on i.MX8QM MEK board. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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Anson Huang authored
Add system power off support for i.MX8QM, when Linux kernel issues "poweroff" command, TF-A will send command to inform system controller to power off whole board according to board design, tested on i.MX8QM MEK board. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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Anson Huang authored
Add domain suspend/resume support, Linux kernel can "echo mem > /sys/power/state" to put system into suspend mode, all CPUs and cluster will be powered off and can be waked up if irq pending in GIC, tested on i.MX8QX MEK board. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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Ying-Chun Liu (PaulLiu) authored
Running optee_test failed because SEC_DRAM0_SIZE is too small. Previous is 2 MB. We enlarge it to 11 MB for passing the test. Also we reduce the NS_DRAM0_SIZE from 13MB to 4MB so that the whole section is still fit in 16MB. This commit also modified the document to reflect the changes we've made in code. Tested-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
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Anson Huang authored
Add domain off support for Linux kernel's cpu hot-plug feature, when there are cpu off request from Linux kernel, TF-A will send command to system controller to do CPU power gate accordingly. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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Anson Huang authored
Add system reset support for i.MX8QX, when Linux kernel issues "reboot" command, TF-A will send command to inform system controller to reset whole board according to board design, tested on i.MX8QX MEK board. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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Anson Huang authored
Add system power off support for i.MX8QX, when Linux kernel issues "poweroff" command, TF-A will send command to inform system controller to power off whole board according to board design, tested on i.MX8QX MEK board. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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- 11 Jul, 2018 6 commits
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Antonio Nino Diaz authored
Implement minimal interrupt routing functions. All interrupts are treated as non-secure interrupts to be handled by the non-secure world. Add note to the documentation about disabling FIQs qhen using OP-TEE with Linux. Change-Id: I937096542d973925e43ae946c5d0b306d0d95a94 Tested-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Sandrine Bailleux authored
The plat_arm_mmap variable is already declared in plat_arm.h, which is included from plat/arm/common/arm_common.c. Similarly, plat_arm.h declares the 'plat_arm_psci_pm_ops' variable, which does not need to be declared again in plat/arm/common/arm_pm.c. The duplication was not compliant with MISRA rule 8.5. Change-Id: Icc42547cc025023226b1078a7ec4f06d093364b7 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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Sandrine Bailleux authored
Wherever we use 'struct foo' and 'foo_t' interchangeably in a function's declaration and definition, use 'struct foo' consistently for both, as per the TF-A coding guidelines [1]. [1] https://github.com/ARM-software/arm-trusted-firmware/wiki/ARM-Trusted-Firmware-Coding-Guidelines#avoid-anonymous-typedefs-of-structsenums-in-header-files Change-Id: I7998eb24a26746e87e9b6425529926406745b721 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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Joel Hutton authored
Change-Id: I2c4b06423fcd96af9351b88a5e2818059f981f1b Signed-off-by: Joel Hutton <Joel.Hutton@Arm.com> Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>
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Roberto Vargas authored
These directives are only used when stabs debugging information is used, but we use ELF which uses DWARF debugging information. Clang assembler doesn't support these directives, and removing them makes the code more compatible with clang. Change-Id: I2803f22ebd24c0fe248e04ef1b17de9cec5f89c4 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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Roberto Vargas authored
Clang linker doesn't support NEXT. As we are not using the MEMORY command to define discontinuous memory for the output file in any of the linker scripts, ALIGN and NEXT are equivalent. Change-Id: I867ffb9c9a76d4e81c9ca7998280b2edf10efea0 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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- 10 Jul, 2018 3 commits
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Roberto Vargas authored
Rule 8.4: A compatible declaration shall be visible when an object or function with external linkage is defined Fixed for: make DEBUG=1 PLAT=juno SPD=tspd CSS_USE_SCMI_SDS_DRIVER=1 all Change-Id: Id732c8df12ef3e20903c41b7ab9a9b55341d68ac Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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Roberto Vargas authored
Rule 8.3: All declarations of an object or function shall use the same names and type qualifiers. Fixed for: make DEBUG=1 PLAT=juno SPD=tspd CSS_USE_SCMI_SDS_DRIVER=1 all Change-Id: Id9dcc6238b39fac6046abc28141e3ef5e7aa998d Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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Roberto Vargas authored
Rule 8.4: A compatible declaration shall be visible when an object or function with external linkage is defined Fixed for: make DEBUG=1 PLAT=juno ARCH=aarch32 AARCH32_SP=sp_min RESET_TO_SP_MIN=1 JUNO_AARCH32_EL3_RUNTIME=1 bl32 Change-Id: I3ac25096b55774689112ae37bdf1222f9a9ecffb Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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