- 18 Aug, 2020 1 commit
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David Pu authored
This patch adds tegra_chipid_is_t194() function to check if it is a Tegra 194 chip. Change-Id: I6da6d3a2c9676b748931e42fde1b174cbcb4fd40 Signed-off-by: David Pu <dpu@nvidia.com>
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- 12 May, 2020 1 commit
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Varun Wadekar authored
This patch returns the SOC version and revision values from the 'plat_get_soc_version' and 'plat_get_soc_revision' handlers. Verified using TFTF SMCCC_ARCH_SOC_ID test. <snip> > Executing 'SMCCC_ARCH_SOC_ID test' TEST COMPLETE Passed SOC Rev = 0x102 SOC Ver = 0x36b0019 <snip> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Change-Id: Ibd7101619143b74f6f6660732daeac1a8bca3e44
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- 01 Aug, 2019 1 commit
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Julius Werner authored
NOTE: __ASSEMBLY__ macro is now deprecated in favor of __ASSEMBLER__. All common C compilers predefine a macro called __ASSEMBLER__ when preprocessing a .S file. There is no reason for TF-A to define it's own __ASSEMBLY__ macro for this purpose instead. To unify code with the export headers (which use __ASSEMBLER__ to avoid one extra dependency), let's deprecate __ASSEMBLY__ and switch the code base over to the predefined standard. Change-Id: Id7d0ec8cf330195da80499c68562b65cb5ab7417 Signed-off-by: Julius Werner <jwerner@chromium.org>
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- 03 Apr, 2019 1 commit
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Ambroise Vincent authored
Now it is needed to use the full path of the common header files. Commit 09d40e0e ("Sanitise includes across codebase") provides more information. Change-Id: Ifedc79d9f664d208ba565f5736612a3edd94c647 Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
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- 18 Jan, 2019 1 commit
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Anthony Zhou authored
Main fixes: Add suffix U for constant [Rule 10.1] Match the operands type [Rule 10.4] Use UL replace U for that constant define that need do "~" operation [Rule 12.4] Voided non c-library functions whose return types are not used [Rule 17.7] Change-Id: Ia1e814ca3890eab7904be9c79030502408f30936 Signed-off-by: Anthony Zhou <anzhou@nvidia.com>
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- 16 Jan, 2019 3 commits
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Harvey Hsieh authored
This patch skips the BTB invalidate workaround for Tegra210-B01 chips, as they have already been fixed in the hardware. To allow the .S file to include macros, add proper guards to tegra_platform.h. Change-Id: I0826d3c54faeffc9cb0709331f47cbdf25d4b653 Signed-off-by: Harvey Hsieh <hhsieh@nvidia.com>
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Marvin Hsu authored
This patch adds helper functions to find out the chip ID of the Tegra SoC. Change-Id: Ia3901dc7cdf77d8c23884d1ed38a80dba6a8afde Signed-off-by: Marvin Hsu <marvinh@nvidia.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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Anthony Zhou authored
This patch adds support for simulation platforms as well as fixes issues flagged by the MISRA scans. Main MISRA fixes: * Added explicit casts (e.g. 0U) to integers in order for them to be compatible with whatever operation they're used in [Rule 10.1] * Fix return type doesn't match the function type [Rule 10.3] * Use single return point instead of multiple [Rule 15.5] * Change return type for the tegra_platform_is_x handlers to bool Change-Id: I871b7c37b22942f6c0c2049c14cc626d4a24d81c Signed-off-by: Anthony Zhou <anzhou@nvidia.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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- 08 Nov, 2018 1 commit
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Antonio Nino Diaz authored
All identifiers, regardless of use, that start with two underscores are reserved. This means they can't be used in header guards. The style that this project is now to use the full name of the file in capital letters followed by 'H'. For example, for a file called "uart_example.h", the header guard is UART_EXAMPLE_H. The exceptions are files that are imported from other projects: - CryptoCell driver - dt-bindings folders - zlib headers Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 22 Aug, 2018 1 commit
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Antonio Nino Diaz authored
The codebase was using non-standard headers. It is needed to replace them by the correct ones so that we can use the new libc headers. Change-Id: I530f71d9510cb036e69fe79823c8230afe890b9d Acked-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 03 May, 2017 1 commit
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dp-arm authored
To make software license auditing simpler, use SPDX[0] license identifiers instead of duplicating the license text in every file. NOTE: Files that have been imported by FreeBSD have not been modified. [0]: https://spdx.org/ Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761a Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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- 13 Apr, 2017 1 commit
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Varun Wadekar authored
This patch adds support to read the chip id and identify if the current platform is Tegra186. Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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- 20 Mar, 2017 1 commit
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Varun Wadekar authored
This patch opens up the interfaces to read the chip's major/minor versions for all Tegra drivers to use. Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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- 02 Mar, 2017 1 commit
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Varun Wadekar authored
This patch adds support to identify the underlying platform on which we are running. The currently supported platforms are actual silicon and simulation platforms. Change-Id: Iadf96e79ec663b3dbd1a18e9bb95ffcdb82fc8af Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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- 30 Jan, 2017 2 commits
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Jeenu Viswambharan authored
The errata reporting policy is as follows: - If an errata workaround is enabled: - If it applies (i.e. the CPU is affected by the errata), an INFO message is printed, confirming that the errata workaround has been applied. - If it does not apply, a VERBOSE message is printed, confirming that the errata workaround has been skipped. - If an errata workaround is not enabled, but would have applied had it been, a WARN message is printed, alerting that errata workaround is missing. The CPU errata messages are printed by both BL1 (primary CPU only) and runtime firmware on debug builds, once for each CPU/errata combination. Relevant output from Juno r1 console when ARM Trusted Firmware is built with PLAT=juno LOG_LEVEL=50 DEBUG=1: VERBOSE: BL1: cortex_a57: errata workaround for 806969 was not applied VERBOSE: BL1: cortex_a57: errata workaround for 813420 was not applied INFO: BL1: cortex_a57: errata workaround for disable_ldnp_overread was applied WARNING: BL1: cortex_a57: errata workaround for 826974 was missing! WARNING: BL1: cortex_a57: errata workaround for 826977 was missing! WARNING: BL1: cortex_a57: errata workaround for 828024 was missing! WARNING: BL1: cortex_a57: errata workaround for 829520 was missing! WARNING: BL1: cortex_a57: errata workaround for 833471 was missing! ... VERBOSE: BL31: cortex_a57: errata workaround for 806969 was not applied VERBOSE: BL31: cortex_a57: errata workaround for 813420 was not applied INFO: BL31: cortex_a57: errata workaround for disable_ldnp_overread was applied WARNING: BL31: cortex_a57: errata workaround for 826974 was missing! WARNING: BL31: cortex_a57: errata workaround for 826977 was missing! WARNING: BL31: cortex_a57: errata workaround for 828024 was missing! WARNING: BL31: cortex_a57: errata workaround for 829520 was missing! WARNING: BL31: cortex_a57: errata workaround for 833471 was missing! ... VERBOSE: BL31: cortex_a53: errata workaround for 826319 was not applied INFO: BL31: cortex_a53: errata workaround for disable_non_temporal_hint was applied Also update documentation. Change-Id: Iccf059d3348adb876ca121cdf5207bdbbacf2aba Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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Jeenu Viswambharan authored
At present, spin locks can only defined from C files. Add some macros such that they can be defined from assembly files too. Change-Id: I64f0c214062f5c15b3c8b412c7f25c908e87d970 Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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- 06 May, 2014 2 commits
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Dan Handley authored
Add tag names to all unnamed structs in header files. This allows forward declaration of structs, which is necessary to reduce header file nesting (to be implemented in a subsequent commit). Also change the typedef names across the codebase to use the _t suffix to be more conformant with the Linux coding style. The coding style actually prefers us not to use typedefs at all but this is considered a step too far for Trusted Firmware. Also change the IO framework structs defintions to use typedef'd structs to be consistent with the rest of the codebase. Change-Id: I722b2c86fc0d92e4da3b15e5cab20373dd26786f
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Dan Handley authored
Move almost all system include files to a logical sub-directory under ./include. The only remaining system include directories not under ./include are specific to the platform. Move the corresponding source files to match the include directory structure. Also remove pm.h as it is no longer used. Change-Id: Ie5ea6368ec5fad459f3e8a802ad129135527f0b3
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- 17 Jan, 2014 1 commit
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Dan Handley authored
Change-Id: Ic7fb61aabae1d515b9e6baf3dd003807ff42da60
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- 05 Dec, 2013 1 commit
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Dan Handley authored
- Add instructions for contributing to ARM Trusted Firmware. - Update copyright text in all files to acknowledge contributors. Change-Id: I9311aac81b00c6c167d2f8c889aea403b84450e5
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- 25 Oct, 2013 1 commit
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Achin Gupta authored
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