- 16 Dec, 2020 1 commit
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Yidi Lin authored
CID 364146: Control flow issues (DEADCODE) Since the value of PSTATE_PWR_LVL_MASK and the value the of PLAT_MAX_PWR_LVL are equal on mt8192, the following equation never hold. if (aff_lvl > PLAT_MAX_PWR_LVL) { return PSCI_E_INVALID_PARAMS; } Remove the deadcode to comply with MISRA standard. Signed-off-by: Yidi Lin <yidi.lin@mediatek.com> Change-Id: I71d0aa826eded8c3b5af961e733167ae40699398
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- 07 Dec, 2020 3 commits
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elly.chiang authored
enable PTP3 for protecting sysPi Signed-off-by: elly.chiang <elly.chiang@mediatek.com> Change-Id: Ic3a13c8314f829dca8547861b98639d1d9444eb2
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Hsin-Hsiung Wang authored
add power-off support Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> Change-Id: If19e99971515a8ae1ac9ae21046e4382adc18a69
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James Liao authored
Implement PSCI platform OPs to support CPU hotplug and MCDI. Change-Id: I31abfc752b69ac40e70bc9e7a55163eb39776c44 Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
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- 28 Oct, 2020 1 commit
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Nina Wu authored
Add system_reset function in psci ops Change-Id: If85be70b8ae9d6487e02626356f0ff1e78b76de9 Signed-off-by: Nina Wu <nina-cm.wu@mediatek.com>
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- 31 Jul, 2020 1 commit
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Nina Wu authored
- Add basic platform setup - Add mt8192 documentation at docs/plat/ - Add generic CPU helper functions - Add basic register address Change-Id: Ife34622105404a8227441aab939e3c55c96374e9 Signed-off-by: Nina Wu <nina-cm.wu@mediatek.com>
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