1. 06 Sep, 2017 1 commit
    • Soby Mathew's avatar
      CSS: Changes for SDS framework · 18e279eb
      Soby Mathew authored
      
      
      This patch does the required changes to enable CSS platforms
      to build and use the SDS framework. Since SDS is always coupled with
      SCMI protocol, the preexisting SCMI build flag is now renamed to
      `CSS_USE_SCMI_SDS_DRIVER` which will enable both SCMI and SDS on
      CSS platforms. Also some of the workarounds applied for SCMI are
      now removed with SDS in place.
      
      Change-Id: I94e8b93f05e3fe95e475c5501c25bec052588a9c
      Signed-off-by: default avatarSoby Mathew <soby.mathew@arm.com>
      18e279eb
  2. 31 Aug, 2017 2 commits
    • Soby Mathew's avatar
      cert_tool: Support for legacy RSA PKCS#1 v1.5 · a8eb286a
      Soby Mathew authored
      
      
      This patch enables choice of RSA version at run time to be used for
      generating signatures by the cert_tool. The RSA PSS as defined in
      PKCS#1 v2.1 becomes the default version and this patch enables to specify
      the RSA PKCS#1 v1.5 algorithm to `cert_create` through the command line
      -a option. Also, the build option `KEY_ALG` can be used to pass this
      option from the build system. Please note that RSA PSS is mandated
      by Trusted Board Boot requirements (TBBR) and legacy RSA support is
      being added for compatibility reasons.
      
      Fixes ARM-Software/tf-issues#499
      Change-Id: Ifaa3f2f7c9b43f3d7b3effe2cde76bf6745a5d73
      Co-Authored-By: default avatarEleanor Bonnici <Eleanor.bonnici@arm.com>
      Signed-off-by: default avatarSoby Mathew <soby.mathew@arm.com>
      a8eb286a
    • Soby Mathew's avatar
      Export KEY_ALG as a user build option · 2091755c
      Soby Mathew authored
      
      
      The `KEY_ALG` variable is used to select the algorithm for key
      generation by `cert_create` tool for signing the certificates. This
      variable was previously undocumented and did not have a global default
      value. This patch corrects this and also adds changes to derive the
      value of `TF_MBEDTLS_KEY_ALG` based on `KEY_ALG` if it not set by the
      platform. The corresponding assignment of these variables are also now
      removed from the `arm_common.mk` makefile.
      Signed-off-by: default avatarSoby Mathew <soby.mathew@arm.com>
      Change-Id: I78e2d6f4fc04ed5ad35ce2266118afb63127a5a4
      2091755c
  3. 30 Aug, 2017 1 commit
    • David Cunado's avatar
      Add usage note for FVP model versions 11.0 and 8.5 · 279fedc1
      David Cunado authored
      
      
      The internal synchronisation timings of the FVP model version
      11.0 build 11.0.34 and version 8.5 build 0.8.5202 has been
      changed compared to older version of the models.
      
      This change may have an impact on how the model behaves depending
      on the workload being run on the model. For example test failures
      have been seen where the primary core has powered on a secondary
      core but was then starved of host CPU time and so was not able to
      update power status, resulting a test failure due to an incorrect
      status. This, or similar behaviour, is not to be expected from
      real hardware platforms.
      
      This patch adds a usage note on how to launch these models so
      that internal synchronisation timing matches that of the older
      version of the models, specifically adding the -Q 100 option.
      
      Change-Id: If922afddba1581b7246ec889b3f1598533ea1b7e
      Signed-off-by: default avatarDavid Cunado <david.cunado@arm.com>
      279fedc1
  4. 09 Aug, 2017 2 commits
    • Etienne Carriere's avatar
      bl32: add secure interrupt handling in AArch32 sp_min · 71816096
      Etienne Carriere authored
      
      
      Add support for a minimal secure interrupt service in sp_min for
      the AArch32 implementation. Hard code that only FIQs are handled.
      
      Introduce bolean build directive SP_MIN_WITH_SECURE_FIQ to enable
      FIQ handling from SP_MIN.
      
      Configure SCR[FIQ] and SCR[FW] from generic code for both cold and
      warm boots to handle FIQ in secure state from monitor.
      
      Since SP_MIN architecture, FIQ are always trapped when system executes
      in non secure state. Hence discard relay of the secure/non-secure
      state in the FIQ handler.
      
      Change-Id: I1f7d1dc7b21f6f90011b7f3fcd921e455592f5e7
      Signed-off-by: default avatarEtienne Carriere <etienne.carriere@st.com>
      71816096
    • Summer Qin's avatar
      Support Trusted OS firmware extra images in TF tools · 71fb3964
      Summer Qin authored
      
      
      Since Trusted OS firmware may have extra images, need to
      assign new uuid and image id for them.
      The TBBR chain of trust has been extended to add support
      for the new images within the existing Trusted OS firmware
      content certificate.
      
      Change-Id: I678dac7ba1137e85c5779b05e0c4331134c10e06
      Signed-off-by: default avatarSummer Qin <summer.qin@arm.com>
      71fb3964
  5. 08 Aug, 2017 1 commit
  6. 01 Aug, 2017 2 commits
    • Jeenu Viswambharan's avatar
      CCI: Adapt for specific product at run time · e33fd445
      Jeenu Viswambharan authored
      
      
      The current build system and driver requires the CCI product to be
      specified at build time. The device constraints can be determined at run
      time from its ID registers, obviating the need for specifying them
      ahead.
      
      This patch adds changes to identify and validate CCI at run time. Some
      global variables are renamed to be in line with the rest of the code
      base.
      
      The build option ARM_CCI_PRODUCT_ID is now removed, and user guide is
      updated.
      
      Change-Id: Ibb765e349d3bc95ff3eb9a64bde1207ab710a93d
      Signed-off-by: default avatarJeenu Viswambharan <jeenu.viswambharan@arm.com>
      e33fd445
    • Jeenu Viswambharan's avatar
      FVP: Add support for multi-threaded CPUs · 11ad8f20
      Jeenu Viswambharan authored
      
      
      ARM CPUs with multi-threading implementation has more than one
      Processing Element in a single physical CPU. Such an implementation will
      reflect the following changes in the MPIDR register:
      
        - The MT bit set;
      
        - Affinity levels pertaining to cluster and CPUs occupy one level
          higher than in a single-threaded implementation, and the lowest
          affinity level pertains to hardware threads. MPIDR affinity level
          fields essentially appear shifted to left than otherwise.
      
      The FVP port henceforth assumes that both properties above to be
      concomitant on a given FVP platform.
      
      To accommodate for varied MPIDR formats at run time, this patch
      re-implements the FVP platform-specific functions that translates MPIDR
      values to a linear indices, along with required validation. The same
      treatment is applied for GICv3 MPIDR hashing function as well.
      
      An FVP-specific build option FVP_MAX_PE_PER_CPU is introduced which
      specifies the maximum number of threads implemented per CPU. For
      backwards compatibility, its value defaults to 1.
      
      Change-Id: I729b00d3e121d16ce9a03de4f9db36dfac580e3f
      Signed-off-by: default avatarJeenu Viswambharan <jeenu.viswambharan@arm.com>
      11ad8f20
  7. 24 Jul, 2017 1 commit
  8. 07 Jul, 2017 1 commit
  9. 06 Jul, 2017 1 commit
    • David Cunado's avatar
      Migrate to Linaro release 17.04 · 31f2f79d
      David Cunado authored
      
      
      ARM TF has been tested against Linaro Release 17.04 - the Linaro
      binaries have been update and also the version of the compiler.
      
      Linaro binaries: 17.01 --> 17.04
      AArch64 & AArch32 compilers: 5.3-2015.05 (gcc 5.3) -> 6.2-2016.11 (gcc 6.2)
      
      This patch updates the User Guide is to state that Linaro
      release 17.04 is supported.
      
      Additionally, the following fixes are made to the User Guide:
      - Removed out of date reference to Linaro release 16.06.
      - Updated the Juno variant coverage to include r2.
      
      Change-Id: Iebbced3356f8c6b3c2bff2df62574db9f937ca7b
      Signed-off-by: default avatarDavid Cunado <david.cunado@arm.com>
      31f2f79d
  10. 05 Jul, 2017 1 commit
    • David Cunado's avatar
      Update Foundation, AEM and Cortex Models versions · 64d50c74
      David Cunado authored
      
      
      Trusted Firmware has been tested as part of its CI system against Cortex
      and Foundation models in the 11.0 Model release available on
      developer.arm.com. Trusted Firmware has also been tested against the v8.5
      AEM model.
      
      This patch updates the user guide documentation to reflect the version of
      the Foundation, AEM and Cortex Models that Trusted Firmware has been
      tested against.
      
      Change-Id: I3b5b4d1e4220bda1dcc88aa9cfa01fa711ed92cd
      Signed-off-by: default avatarDavid Cunado <david.cunado@arm.com>
      64d50c74
  11. 29 Jun, 2017 2 commits