Skip to content

GitLab

Switch branch/tag
  1. 07 Oct, 2019 1 commit
  3. 04 Oct, 2019 2 commits
    • laurenw-arm's avatar
      Neoverse N1 Errata Workaround 1542419 · 80942622
      laurenw-arm authored 
      

Coherent I-cache is causing a prefetch violation where when the core
executes an instruction that has recently been modified, the core might
fetch a stale instruction which violates the ordering of instruction
fetches.

The workaround includes an instruction sequence to implementation
defined registers to trap all EL0 IC IVAU instructions to EL3 and a trap
handler to execute a TLB inner-shareable invalidation to an arbitrary
address followed by a DSB.
Signed-off-by: default avatarLauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: Ic3b7cbb11cf2eaf9005523ef5578a372593ae4d6
      80942622
    • Soby Mathew's avatar
      Fix the CAS spinlock implementation · c97cba4e
      Soby Mathew authored 
      

Make the spinlock implementation use ARMv8.1-LSE CAS instruction based
on a platform build option. The CAS-based implementation used to be
unconditionally selected for all ARM8.1+ platforms.

The previous CAS spinlock implementation had a bug wherein the spin_unlock()
implementation had an `sev` after `stlr` which is not sufficient. A dsb is
needed to ensure that the stlr completes prior to the sev. Having a dsb is
heavyweight and a better solution would be to use load exclusive semantics
to monitor the lock and wake up from wfe when a store happens to the lock.
The patch implements the same.

Change-Id: I5283ce4a889376e4cc01d1b9d09afa8229a2e522
Signed-off-by: default avatarSoby Mathew <soby.mathew@arm.com>
Signed-off-by: default avatarOlivier Deprez <olivier.deprez@arm.com>
      c97cba4e
  5. 02 Oct, 2019 1 commit
  7. 01 Oct, 2019 1 commit
    • Radoslaw Biernacki's avatar
      qemu/qemu_sbsa: Adding Qemu SBSA platform · 558a6f44
      Radoslaw Biernacki authored 
      

This patch introduces Qemu SBSA platform.
Both platform specific files where copied from qemu/qemu with changes for
DRAM base above 32bit and removal of ARMv7 conditional defines/code.
Documentation is aligned to rest of SBSA patches along the series and
planed changes in edk2-platform repo.

Fixes ARM-software/tf-issues#602
Signed-off-by: default avatarRadoslaw Biernacki <radoslaw.biernacki@linaro.org>
Change-Id: I8ebc34eedb2268365e479ef05654b2df1b99128c
      558a6f44
  9. 30 Sep, 2019 1 commit
  11. 26 Sep, 2019 2 commits
  13. 25 Sep, 2019 2 commits
    • Paul Beesley's avatar
      doc: Fix platform port inclusion · f1e0f152
      Paul Beesley authored 
      

This patch:

- Adds any leftover platform ports that were not having their
  documentation built (not in the index.rst table of contents)
- Corrects a handful of RST formatting errors that cause poor
  rendering
- Reorders the list of platforms so that they are displayed
  in alphabetical order

Change-Id: If8c135a822d581c3c5c4fca2936d501ccfd2e94c
Signed-off-by: default avatarPaul Beesley <paul.beesley@arm.com>
      f1e0f152
    • Andre Przywara's avatar
      rpi4: Add initial documentation file · e0dea671
      Andre Przywara authored 
      

As the Raspberry Pi4 port is now in a usable state, add the build
instructions together with some background information to the
documentation directory.
The port differs quite a bit from the Raspberry Pi 3, so we use a
separate file for that.

Change-Id: I7d9f5967fdf3ec3bfe97d78141f59cbcf03388d4
Signed-off-by: default avatarAndre Przywara <andre.przywara@arm.com>
      e0dea671
  15. 20 Sep, 2019 1 commit
    • Paul Beesley's avatar
      doc: Render Marvell platform documents · 2966defa
      Paul Beesley authored 
      

The documentation for Marvell platforms was not included in the
rendered document output until now because, while it was mostly
valid RST format, the files were saved with a .txt extension.

This patch corrects some RST formatting errors, creates a document
tree (index page) for the Marvell documents, and adds the Marvell
subtree to the main index.

Change-Id: Id7d4ac37eded636f8f62322a153e1e5f652ff51a
Signed-off-by: default avatarPaul Beesley <paul.beesley@arm.com>
      2966defa
  17. 18 Sep, 2019 1 commit
  19. 13 Sep, 2019 1 commit
    • Alexei Fedorov's avatar
      Refactor ARMv8.3 Pointer Authentication support code · ed108b56
      Alexei Fedorov authored 
      

This patch provides the following features and makes modifications
listed below:
- Individual APIAKey key generation for each CPU.
- New key generation on every BL31 warm boot and TSP CPU On event.
- Per-CPU storage of APIAKey added in percpu_data[]
  of cpu_data structure.
- `plat_init_apiakey()` function replaced with `plat_init_apkey()`
  which returns 128-bit value and uses Generic timer physical counter
  value to increase the randomness of the generated key.
  The new function can be used for generation of all ARMv8.3-PAuth keys
- ARMv8.3-PAuth specific code placed in `lib\extensions\pauth`.
- New `pauth_init_enable_el1()` and `pauth_init_enable_el3()` functions
  generate, program and enable APIAKey_EL1 for EL1 and EL3 respectively;
  pauth_disable_el1()` and `pauth_disable_el3()` functions disable
  PAuth for EL1 and EL3 respectively;
  `pauth_load_bl31_apiakey()` loads saved per-CPU APIAKey_EL1 from
  cpu-data structure.
- Combined `save_gp_pauth_registers()` function replaces calls to
  `save_gp_registers()` and `pauth_context_save()`;
  `restore_gp_pauth_registers()` replaces `pauth_context_restore()`
  and `restore_gp_registers()` calls.
- `restore_gp_registers_eret()` function removed with corresponding
  code placed in `el3_exit()`.
- Fixed the issue when `pauth_t pauth_ctx` structure allocated space
  for 12 uint64_t PAuth registers instead of 10 by removal of macro
  CTX_PACGAKEY_END from `include/lib/el3_runtime/aarch64/context.h`
  and assigning its value to CTX_PAUTH_REGS_END.
- Use of MODE_SP_ELX and MODE_SP_EL0 macro definitions
  in `msr	spsel`  instruction instead of hard-coded values.
- Changes in documentation related to ARMv8.3-PAuth and ARMv8.5-BTI.

Change-Id: Id18b81cc46f52a783a7e6a09b9f149b6ce803211
Signed-off-by: default avatarAlexei Fedorov <Alexei.Fedorov@arm.com>
      ed108b56
  21. 12 Sep, 2019 3 commits
    • Justin Chadwell's avatar
      Remove RSA PKCS#1 v1.5 support from cert_tool · 6a415a50
      Justin Chadwell authored 
      Support for PKCS#1 v1.5 was deprecated in SHA 1001202d and fully removed
in SHA fe199e3b

, however, cert_tool is still able to generate
certificates in that form. This patch fully removes the ability for
cert_tool to generate these certificates.

Additionally, this patch also fixes a bug where the issuing certificate
was a RSA and the issued certificate was EcDSA. In this case, the issued
certificate would be signed using PKCS#1 v1.5 instead of RSAPSS per
PKCS#1 v2.1, preventing TF-A from verifying the image signatures. Now
that PKCS#1 v1.5 support is removed, all certificates that are signed
with RSA now use the more modern padding scheme.

Change-Id: Id87d7d915be594a1876a73080528d968e65c4e9a
Signed-off-by: default avatarJustin Chadwell <justin.chadwell@arm.com>
      6a415a50
    • Justin Chadwell's avatar
      Add documentation for new KEY_SIZE option · f29213d9
      Justin Chadwell authored 
      

This patch adds documentation for the new KEY_SIZE build option that is
exposed by cert_create, and instructions on how to use it.

Change-Id: I09b9b052bfdeeaca837e0f0026e2b01144f2472c
Signed-off-by: default avatarJustin Chadwell <justin.chadwell@arm.com>
      f29213d9
    • Hadi Asyrafi's avatar
      Invalidate dcache build option for bl2 entry at EL3 · b90f207a
      Hadi Asyrafi authored 
      

Some of the platform (ie. Agilex) make use of CCU IPs which will only be
initialized during bl2_el3_early_platform_setup. Any operation to the
cache beforehand will crash the platform. Hence, this will provide an
option to skip the data cache invalidation upon bl2 entry at EL3
Signed-off-by: default avatarHadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I2c924ed0589a72d0034714c31be8fe57237d1f06
      b90f207a
  23. 11 Sep, 2019 1 commit
    • Justin Chadwell's avatar
      Add UBSAN support and handlers · 1f461979
      Justin Chadwell authored 
      

This patch adds support for the Undefined Behaviour sanitizer. There are
two types of support offered - minimalistic trapping support which
essentially immediately crashes on undefined behaviour and full support
with full debug messages.

The full support relies on ubsan.c which has been adapted from code used
by OPTEE.

Change-Id: I417c810f4fc43dcb56db6a6a555bfd0b38440727
Signed-off-by: default avatarJustin Chadwell <justin.chadwell@arm.com>
      1f461979
  25. 09 Sep, 2019 1 commit
  27. 05 Sep, 2019 1 commit
  29. 04 Sep, 2019 1 commit
  31. 29 Aug, 2019 1 commit
  33. 01 Aug, 2019 1 commit
  35. 22 Jul, 2019 1 commit
    • Imre Kis's avatar
      Romlib makefile refactoring and script rewriting · d8210dc6
      Imre Kis authored 
      

The features of the previously existing gentbl, genvar and genwrappers
scripts were reimplemented in the romlib_generator.py Python script.
This resulted in more readable and maintainable code and the script
introduces additional features that help dependency handling in
makefiles. The assembly templates were separated from the script logic
and were collected in the 'templates' directory.

The targets and their dependencies were reorganized in the makefile and
the dependency handling of included index files is possible now.
Incremental build is available in case of modifying the index files.
Signed-off-by: default avatarImre Kis <imre.kis@arm.com>
Change-Id: I79f65fab9dc5c70d1f6fc8f57b2a3009bf842dc5
      d8210dc6
  37. 18 Jul, 2019 1 commit
  39. 17 Jul, 2019 1 commit
  41. 12 Jul, 2019 1 commit
    • Paul Beesley's avatar
      doc: Generate PlantUML diagrams automatically · 7cb68807
      Paul Beesley authored 
      

Currently we have some pre-rendered versions of certain diagrams
in SVG format. These diagrams have corresponding PlantUML source
that can be rendered automatically as part of the documentation
build, removing the need for any intermediate files.

This patch adds the Sphinx "plantuml" extension, replaces
references to the pre-rendered SVG files within the documents,
and finally removes the SVG files and helper script.

New requirements for building the docs are the
"sphinxcontrib-plantuml" Python module (added to the pip
requirements.txt file) and the Graphviz package (provides the
"dot" binary) which is in the Ubuntu package repositories.

Change-Id: I24b52ee40ff79676212ed7cff350294945f1b50d
Signed-off-by: default avatarPaul Beesley <paul.beesley@arm.com>
      7cb68807
  43. 10 Jul, 2019 2 commits
  45. 09 Jul, 2019 2 commits
  47. 08 Jul, 2019 1 commit
  49. 02 Jul, 2019 9 commits