- 24 Oct, 2020 2 commits
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Abdul Halim, Muhammad Hadi Asyrafi authored
Sort and rearrange definitions in both mailbox and sip header to increase readability and maintainability. Signed-off-by:Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> Change-Id: I5544c2f17efdf3174757c55afd8cc1062fbae856
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Chee Hong Ang authored
Ensure 'PLAT_SEC_ENTRY' is cleared during early platform setup. This is to prevent the slave CPU cores jump to the stale entry point after warm reset when using U-Boot SPL as first stage boot loader. Signed-off-by:Chee Hong Ang <chee.hong.ang@intel.com> Change-Id: I3294ce2f74aa691d0cf311fa30f27f9d4fb8800a
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- 08 Jun, 2020 2 commits
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Tien Hock Loh authored
FPGAINTF wasn't enabled when configuring pinmux. This fixes the issue. Signed-off-by:Tien Hock Loh <tien.hock.loh@intel.com> Change-Id: I5a6aacd504901b8f7327b2f4854b8a77d0c37019
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Tien Hock Loh authored
DRVSEL and SMPLSEL needs to be set so that it can properly go into full speed mode. This needs to be done in EL3 as the registers are secured. Signed-off-by:
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- 27 Feb, 2020 1 commit
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Abdul Halim, Muhammad Hadi Asyrafi authored
Modify RSU driver error code for backward-compatibility with Linux RSU driver Signed-off-by:
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- 25 Feb, 2020 2 commits
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Abdul Halim, Muhammad Hadi Asyrafi authored
This patch comes as fixes for 'intel: Fix Coverity Scan Defects' patch. Revert changing argument type from uint32_t to uint64_t to fix incompatible cast issue. Fix said bug by using intermediate uint32_t array as a more appropriate solution. Signed-off-by: -
Tien Hock, Loh authored
This initializes the EMAC PHY in both Stratix 10 and Agilex, without this, EMAC PHY wouldn't work correctly. Change-Id: I7e6b9e88fd9ef472884fcf648e6001fcb7549ae6 Signed-off-by:
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- 20 Feb, 2020 1 commit
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Abdul Halim, Muhammad Hadi Asyrafi authored
Fix mailbox driver incompatible cast bug and control flow issue that was flagged by Coverity Scan. Signed-off-by:
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- 05 Feb, 2020 2 commits
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Hadi Asyrafi authored
This update allows normal world to send mailbox commands through SMC Signed-off-by: -
Hadi Asyrafi authored
Introduce support for RSU that can be initiated through SMC calls. Added features as below: - RSU status - RSU update - RSU HPS notify - RSU get sub-partition Signed-off-by:
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- 03 Feb, 2020 1 commit
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Hadi Asyrafi authored
Platform handoff structure no longer includes boot source selection. Hence, those settings can now be configured through socfpga_plat_def.h. Signed-off-by:
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- 28 Jan, 2020 1 commit
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Madhukar Pappireddy authored
This flag warns if anything is declared more than once in the same scope, even in cases where multiple declaration is valid and changes nothing. Consequently, this patch also fixes the issues reported by this flag. Consider the following two lines of code from two different source files(bl_common.h and bl31_plat_setup.c): IMPORT_SYM(uintptr_t, __RO_START__, BL_CODE_BASE); IMPORT_SYM(unsigned long, __RO_START__, BL2_RO_BASE); The IMPORT_SYM macro which actually imports a linker symbol as a C expression. The macro defines the __RO_START__ as an extern variable twice, one for each instance. __RO_START__ symbol is defined by the linker script to mark the start of the Read-Only area of the memory map. Essentially, the platform code redefines the linker symbol with a different (relevant) name rather than using the standard symbol. A simple solution to fix this issue in the platform code for redundant declarations warning is to remove the second IMPORT_SYM and replace it with following assignment static const unsigned long BL2_RO_BASE = BL_CODE_BASE; Change-Id: If4835d1ee462d52b75e5afd2a59b64828707c5aa Signed-off-by:Madhukar Pappireddy <madhukar.pappireddy@arm.com>
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- 24 Jan, 2020 1 commit
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Deepika Bhavnani authored
PLATFORM_CORE_COUNT - Unsigned int PLATFORM_CLUSTER_COUNT - Unsigned int PLATFORM_MAX_CPUS_PER_CLUSTER - Unsigned int PLATFORM_CORE_COUNT_PER_CLUSTER - Unsigned int Signed-off-by:Deepika Bhavnani <deepika.bhavnani@arm.com> Change-Id: Id3d3efc7e7711d19f0223da823713b8390ad2f47
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- 16 Jan, 2020 3 commits
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Hadi Asyrafi authored
Create a function to check for fpga readiness, and move the checking out of bridge enable function. Signed-off-by: -
Hadi Asyrafi authored
Refactored system manager driver to be shared across both intel platform Signed-off-by: -
Hadi Asyrafi authored
Refactor reset manager into intel common platform directory as it can be shared by both Stratix 10 and Agilex. Register address and field is now referred through macros. Signed-off-by:
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- 15 Jan, 2020 1 commit
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Tien Hock, Loh authored
UEFI decompression will fail if the payload size is too large and the load address is too low. This patch moves the payload to a higher address to fix the issue Signed-off-by:
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- 30 Dec, 2019 1 commit
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Hadi Asyrafi authored
Add support for platform specific warm-reset through psci system reset 2. - system_reset2 implementation that calls for l2 cache reset - Check for magic number and request for warm reset in bl2 - Create a shared reset manager header file for Agilex and Stratix 10 - Clean up parameter info in plat_get_next_bl_params Signed-off-by:
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- 17 Dec, 2019 9 commits
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Hadi Asyrafi authored
Mailbox driver now handles variable response length Signed-off-by: -
Hadi Asyrafi authored
Modify mailbox config return code to improve debugging. Signed-off-by: -
Tien Hock, Loh authored
Fixes the SiP Service driver that is responsible for FPGA reconfiguration. Also change the base address of FPGA reconfiguration to 0x400000. Signed-off-by: -
Tien Hock, Loh authored
There are a few issues in mailbox that needs to be fixed. - Send doorbell after an indirect cmd - Do not ring doorbell when polling mailbox response as it should've been sent by send_cmd - remove unneeded cmd_free_offset check - Fix mailbox initialization - Fix get_config_status returning a wrong status when the status is busy - Add command length in mailbox command header Signed-off-by: -
Hadi Asyrafi authored
Add-in support for handling BL31 parameter from non-BL2 image, ie. SPL Signed-off-by: -
Hadi Asyrafi authored
Load BL31 to DDR instead of On-Chip RAM for scalability. Also, make use of On-Chip RAM for BL31 specific variables filling down from handoff offset to reduce fragmentation Signed-off-by: -
Hadi Asyrafi authored
This patch will provide an entrypoint for uboot's spl into BL31. BL31 will also handle secondary cpu state during uboot's cold boot Signed-off-by: -
Hadi Asyrafi authored
Move the get_config_status out of sip_svc driver. Modify the function so that it can return either CONFIG_STATUS or RECONFIG_STATUS Signed-off-by: -
Hadi Asyrafi authored
Separate SiP related definition from mailbox header file Signed-off-by:
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- 28 Nov, 2019 3 commits
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Hadi Asyrafi authored
Pull out mailbox driver into common area as they can be shared between intel's socfpga platform Signed-off-by: -
Hadi Asyrafi authored
Share socfpga private definitions and storage driver between Agilex and Stratix 10 platform. Signed-off-by: -
Hadi Asyrafi authored
Pull out handoff driver to intel/soc/ common directory as they can be shared by both Agilex and Stratix10 platform. Share platform_def header between both Agilex and Stratix10 and store platform specific definitions in socfpga_plat_def.h Signed-off-by:
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- 07 Aug, 2019 1 commit
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Hadi Asyrafi authored
Pull out common code from aarch64 and include Signed-off-by:
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