- 24 Jan, 2018 2 commits
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Peter Griffin authored
Update the memory firewall configuration to reserve 4 MB of secure RAM for use by the kernel and OP-TEE as the Secure Data Path pool. Note that this address range (0x3E800000 - 0x3EC00000) falls in the range already set aside by UEFI (which reserves the upper 32 MB of the 1GB DRAM for OP-TEE [1]) and was previously unused. [1] https://github.com/96boards-hikey/edk2/blob/hikey/HisiPkg/HiKeyPkg/Library/HiKeyLib/HiKeyMem.c#L44 Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Acked-by: Victor Chong <victor.chong@linaro.org>
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Jerome Forissier authored
DRAM region 0x3f000000 - 0x3fffffff is reserved for OP-TEE and should therefore be accessible only from secure world. Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Acked-by: Victor Chong <victor.chong@linaro.org>
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- 14 Jul, 2017 2 commits
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Jorge Ramirez-Ortiz authored
The board features the Hi3798C V200 with an integrated quad-core 64-bit ARM Cortex A53 processor and high performance Mali T720 GPU, making it capable of running any commercial set-top solution based on Linux or Android. Its high performance specification also supports a premium user experience with up to H.265 HEVC decoding of 4K video at 60 frames per second. SOC Hisilicon Hi3798CV200 CPU Quad-core ARM Cortex-A53 64 bit DRAM DDR3/3L/4 SDRAM interface, maximum 32-bit data width 2 GB USB Two USB 2.0 ports One USB 3.0 ports CONSOLE USB-micro port for console support ETHERNET 1 GBe Ethernet PCIE One PCIe 2.0 interfaces JTAG 8-Pin JTAG EXPANSION INTERFACE Linaro 96Boards Low Speed Expansion slot DIMENSION Standard 160×120 mm 96Boards Enterprice Edition form factor WIFI 802.11AC 2*2 with Bluetooth CONNECTORS One connector for Smart Card One connector for TSI The platform boot sequence is as follows: l-loader --> arm_trusted_firmware --> u-boot Repositories: - https://github.com/Linaro/poplar-l-loader.git - https://github.com/Linaro/poplar-u-boot.git U-Boot is also upstream in the project's master branch. Make sure you are using the correct branch on each one of these repositories. The definition of "correct" might change over time (at this moment in time this would be the "latest" branch). Build Line: make CROSS_COMPILE=aarch64-linux-gnu- all fip SPD=none DEBUG=1 PLAT=poplar BL33=/path/to/u-boot.bin Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org> Signed-off-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Alex Elder <elder@linaro.org> Tested-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org> Tested-by: Leo Yan <leo.yan@linaro.org> Tested-by: Alex Elder <elder@linaro.org>
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Isla Mitchell authored
This fix modifies the order of system includes to meet the ARM TF coding standard. There are some exceptions to this change in order to retain header groupings and where there are headers within #if statements. Change-Id: Ib5b668c992d817cc860e97b29e16ef106d17e404 Signed-off-by: Isla Mitchell <isla.mitchell@arm.com>
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- 12 Jul, 2017 5 commits
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Victor Chong authored
Signed-off-by: Victor Chong <victor.chong@linaro.org> Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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Victor Chong authored
Signed-off-by: Victor Chong <victor.chong@linaro.org>
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Victor Chong authored
PLATFORM_LINKER_FORMAT and PLATFORM_LINKER_ARCH defines are removed from plat/hisilicon/hikey/include/platform_def.h since there are already defined in include/plat/common/common_def.h which is included by plat/hisilicon/hikey/hikey_def.h which is included by plat/hisilicon/hikey/include/platform_def.h The line $(eval $(call FIP_ADD_IMG,SCP_BL2,--scp-fw)) is removed from plat/hisilicon/hikey/platform.mk to clear the warning below: Makefile:544: warning: overriding commands for target `check_SCP_BL2' plat/hisilicon/hikey/platform.mk:19: warning: ignoring old commands for target `check_SCP_BL2' $(eval $(call FIP_ADD_IMG,SCP_BL2,--scp-fw)) already exists in Makefile and applies to plat hikey so is redundant in plat/hisilicon/hikey/platform.mk Signed-off-by: Victor Chong <victor.chong@linaro.org>
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Victor Chong authored
Signed-off-by: Victor Chong <victor.chong@linaro.org>
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Victor Chong authored
The line $(eval $(call FIP_ADD_IMG,SCP_BL2,--scp-fw)) is removed from plat/hisilicon/hikey960/platform.mk to clear the warning below: Makefile:544: warning: overriding commands for target `check_SCP_BL2' plat/hisilicon/hikey960/platform.mk:13: warning: ignoring old commands for target `check_SCP_BL2' $(eval $(call FIP_ADD_IMG,SCP_BL2,--scp-fw)) already exists in Makefile and applies to plat hikey960 so is redundant in plat/hisilicon/hikey960/platform.mk Signed-off-by: Victor Chong <victor.chong@linaro.org> Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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- 11 Jul, 2017 1 commit
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Victor Chong authored
Fix cortex a53 errata issues: #836870, #843419, #855873. Signed-off-by: Victor Chong <victor.chong@linaro.org> Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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- 10 Jul, 2017 1 commit
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Haojian Zhuang authored
Fix cortex a53 errata issues: #836870, #843419, #855873. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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- 20 Jun, 2017 1 commit
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David Cunado authored
The patch fb7d32e5 migrated the CPU libraries to have unique defines, prefixing them with the CPU name. This patch migrates the hikey960 platform port to use the A53 specific defines. Change-Id: Id76f544b0b236bbd4974ab5ffa1203f073c20021 Signed-off-by: David Cunado <david.cunado@arm.com>
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- 19 Jun, 2017 1 commit
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Leo Yan authored
In CPU off callback function, the old code uses the function hisi_test_pwrdn_allcores() to check if all CPUs in cluster have been powered off and if it's valid then power off the whole cluster. But the function hisi_test_pwrdn_allcores() only maintains the different power states only for CPU suspend/resume flow, so it cannot return correct states for CPU on/off flow. This patch is to change use hisi_test_cpu_down() to check if all CPUs have been powered off, so that can power off the whole cluster properly when all CPUs in cluster have been hotplugged off. Signed-off-by: Tao Wang <kevin.wangtao@hisilicon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org>
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- 15 Jun, 2017 1 commit
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Haojian Zhuang authored
Since this mailbox driver is abandoned, remove it. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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- 14 Jun, 2017 1 commit
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Varun Wadekar authored
This patch makes all the defines in the CPU libraries unique, by prefixing them with the CPU name. NOTE: PLATFORMS USING THESE MACROS WILL HAVE TO UPDATE THEIR CODE TO START USING THE UPDATED NAMES Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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- 13 Jun, 2017 1 commit
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Haojian Zhuang authored
Since the type of ADC value is always unsigned int, don't need to check the value with negative value. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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- 07 Jun, 2017 4 commits
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Haojian Zhuang authored
Support BL31 on HiKey960 platform. Implement PSCI. Signed-off-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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Haojian Zhuang authored
BL2 loads MCU firmware & BL31 on hikey960 platform. The MCU firmware is used to implement low power feature. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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Haojian Zhuang authored
Support BL1 on HiKey960 platform. When recovery mode is detected, BL1 loads NS BL1U that flushs images into UFS. When normal boot mode is detected, BL1 loads BL2. Fix for https://github.com/ARM-software/tf-issues/issues/486 Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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Vincent Guittot authored
enable PMF service call and instrumetion for hikey platform Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org>
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- 31 May, 2017 4 commits
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Leo Yan authored
This patch is to enable CPU suspend/resume and system level's suspend/resume; also enable system power off state. Signed-off-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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Leo Yan authored
The cluster 0 doesn't rely on PSCI to enable it; so enable CCI port for cluster 0 in BL31 platform setup flow. Signed-off-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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Leo Yan authored
Fix for CPU topology so present the CPU core numbers for two clusters; Base on this fixing, the PSCI can maintain correct power states. Signed-off-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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Haojian Zhuang authored
Fix uninitliazed variable in ddr driver code. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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- 24 May, 2017 3 commits
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Haojian Zhuang authored
Support BL31 and PSCI. Enable multiple cores in PSCI. Change-Id: I66c39e1e9c4c45ac41a0142ed2070d79a3ac5ba3 Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by: Dan Handley <dan.handley@arm.com>
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Haojian Zhuang authored
BL2 is used to load BL31 and SCP_BL2. In HiKey platform, SCP_BL2 is the mcu firmware that is used to scale cpu frequency and switch low power mode. Change-Id: I1621aa65bea989fd125ee8502fd56ef72362bf97 Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by: Dan Handley <dan.handley@arm.com>
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Haojian Zhuang authored
Initialize regulators, pins and eMMC in BL1. Only SRAM could be used in BL1. So BL2 will be loaded from eMMC into SRAM later. Change-Id: I8e7ef82ffa29a3c647c9d2d2981e8759ee85d833 Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by: Dan Handley <dan.handley@arm.com>
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