- 24 Jan, 2018 2 commits
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Peter Griffin authored
Update the memory firewall configuration to reserve 4 MB of secure RAM for use by the kernel and OP-TEE as the Secure Data Path pool. Note that this address range (0x3E800000 - 0x3EC00000) falls in the range already set aside by UEFI (which reserves the upper 32 MB of the 1GB DRAM for OP-TEE [1]) and was previously unused. [1] https://github.com/96boards-hikey/edk2/blob/hikey/HisiPkg/HiKeyPkg/Library/HiKeyLib/HiKeyMem.c#L44 Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Acked-by: Victor Chong <victor.chong@linaro.org>
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Jerome Forissier authored
DRAM region 0x3f000000 - 0x3fffffff is reserved for OP-TEE and should therefore be accessible only from secure world. Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Acked-by: Victor Chong <victor.chong@linaro.org>
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- 14 Jul, 2017 1 commit
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Isla Mitchell authored
This fix modifies the order of system includes to meet the ARM TF coding standard. There are some exceptions to this change in order to retain header groupings and where there are headers within #if statements. Change-Id: Ib5b668c992d817cc860e97b29e16ef106d17e404 Signed-off-by: Isla Mitchell <isla.mitchell@arm.com>
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- 12 Jul, 2017 3 commits
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Victor Chong authored
Signed-off-by: Victor Chong <victor.chong@linaro.org>
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Victor Chong authored
PLATFORM_LINKER_FORMAT and PLATFORM_LINKER_ARCH defines are removed from plat/hisilicon/hikey/include/platform_def.h since there are already defined in include/plat/common/common_def.h which is included by plat/hisilicon/hikey/hikey_def.h which is included by plat/hisilicon/hikey/include/platform_def.h The line $(eval $(call FIP_ADD_IMG,SCP_BL2,--scp-fw)) is removed from plat/hisilicon/hikey/platform.mk to clear the warning below: Makefile:544: warning: overriding commands for target `check_SCP_BL2' plat/hisilicon/hikey/platform.mk:19: warning: ignoring old commands for target `check_SCP_BL2' $(eval $(call FIP_ADD_IMG,SCP_BL2,--scp-fw)) already exists in Makefile and applies to plat hikey so is redundant in plat/hisilicon/hikey/platform.mk Signed-off-by: Victor Chong <victor.chong@linaro.org>
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Victor Chong authored
Signed-off-by: Victor Chong <victor.chong@linaro.org>
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- 10 Jul, 2017 1 commit
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Haojian Zhuang authored
Fix cortex a53 errata issues: #836870, #843419, #855873. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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- 14 Jun, 2017 1 commit
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Varun Wadekar authored
This patch makes all the defines in the CPU libraries unique, by prefixing them with the CPU name. NOTE: PLATFORMS USING THESE MACROS WILL HAVE TO UPDATE THEIR CODE TO START USING THE UPDATED NAMES Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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- 07 Jun, 2017 1 commit
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Vincent Guittot authored
enable PMF service call and instrumetion for hikey platform Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org>
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- 31 May, 2017 4 commits
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Leo Yan authored
This patch is to enable CPU suspend/resume and system level's suspend/resume; also enable system power off state. Signed-off-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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Leo Yan authored
The cluster 0 doesn't rely on PSCI to enable it; so enable CCI port for cluster 0 in BL31 platform setup flow. Signed-off-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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Leo Yan authored
Fix for CPU topology so present the CPU core numbers for two clusters; Base on this fixing, the PSCI can maintain correct power states. Signed-off-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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Haojian Zhuang authored
Fix uninitliazed variable in ddr driver code. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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- 24 May, 2017 3 commits
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Haojian Zhuang authored
Support BL31 and PSCI. Enable multiple cores in PSCI. Change-Id: I66c39e1e9c4c45ac41a0142ed2070d79a3ac5ba3 Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by: Dan Handley <dan.handley@arm.com>
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Haojian Zhuang authored
BL2 is used to load BL31 and SCP_BL2. In HiKey platform, SCP_BL2 is the mcu firmware that is used to scale cpu frequency and switch low power mode. Change-Id: I1621aa65bea989fd125ee8502fd56ef72362bf97 Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by: Dan Handley <dan.handley@arm.com>
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Haojian Zhuang authored
Initialize regulators, pins and eMMC in BL1. Only SRAM could be used in BL1. So BL2 will be loaded from eMMC into SRAM later. Change-Id: I8e7ef82ffa29a3c647c9d2d2981e8759ee85d833 Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by: Dan Handley <dan.handley@arm.com>
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