- 04 Jan, 2019 3 commits
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Jolly Shah authored
This API will be used to set the PLL mode: reset (unlocked), integer or fractional (locked). If reset mode is set the PM controller will bypass the target PLL prior to asserting the reset. If integer or fractional mode is set the PM controller will program and trigger locking of the PLL. If success status is returned the PLL is locked and its bypass is deasserted. If fractional mode is set the fractional divider (data parameter) has to have a non-zero value prior to issuing pll set fractional mode. The caller need to ensure that the data parameter is properly set using pll get/set parameter EEMI API. Signed-off-by: Mirela Simonovic <mirela.simonovic@aggios.com> Acked-by: Will Wong <WILLW@xilinx.com> Signed-off-by: Jolly Shah <jollys@xilinx.com>
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Jolly Shah authored
This API will be used to get a parameter for the PLL. Parameter values represent the values as defined in the Zynq MPSoC register reference manual ug1087. Signed-off-by: Mirela Simonovic <mirela.simonovic@aggios.com> Acked-by: Will Wong <WILLW@xilinx.com> Signed-off-by: Jolly Shah <jollys@xilinx.com>
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Jolly Shah authored
This API will be used to set a parameter for the PLL. The parameter value that is set will have effect once the PLL mode is set to integer or fractional mode. Parameter values represent the values as defined in the Zynq MPSoC register reference manual ug1087. Signed-off-by: Mirela Simonovic <mirela.simonovic@aggios.com> Acked-by: Will Wong <WILLW@xilinx.com> Signed-off-by: Jolly Shah <jollys@xilinx.com>
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- 04 Sep, 2018 2 commits
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Siva Durga Prasad Paladugu authored
This patch adds ATF support for AES data blob encrypt/decrypt. ATF establishes a path to send the address of the structure to the xilsecure, so that it will pick addresses of the data and performs the requested operation (encrypt/decrypt) and puts the result in load address. where structure contains - Data blob src address - load address - IV address - Key address - this will actual key addr in case of KUP else it will be zero. - Data-size - Aes-op type - KeySrc Signed-off-by: Kalyani Akula <kalyani.akula@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
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Siva Durga Prasad Paladugu authored
This patch adds new API's for performing pl configuration readback. Signed-off-by: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
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- 27 Aug, 2018 1 commit
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Rajan Vaja authored
Currently in Linux maximum number of clocks is hard-coded and so it needs to allocate static memory. It can get actual clock number after querying all clock names by special clock name string. Add new query data parameter to get actual number of clocks so Linux can get actual clock numbers in advance. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
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- 17 May, 2018 10 commits
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Siva Durga Prasad Paladugu authored
This patch adds new API for processing secure images. This API is used for authentication and decryption of secure images using xilsecure in pmufw. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
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Tejas Patel authored
Existing code blocks each IPI send request in ipi_mb_notify() function till pmu clears respective bit in ipi observation register. After sending PM_SYSTEM_SHUTDOWN request to PMU, PMU will restart APU. While PMU is restarting APU, ATF is running out of OCM, which can cause read/write hang from/to OCM. There is no need to wait for notification from PMU in case of SystemShutdown request in ATF, as APU is going to restart. This patch fixes APU only restart issue. Signed-off-by: Tejas Patel <tejasp@xilinx.com> Acked-by: Wendy Liang <wendy.liang@xilinx.com>
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Siva Durga Prasad Paladugu authored
This patch makes bitstream load blocking call and waits until bitstream is loaded successfully or return with error. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Avesh Khan <aveshk@xilinx.com>
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Siva Durga Prasad Paladugu authored
GET_CALLBACK_DATA function is not required now. IPI mailbox can be used instead of GET_CALLBACK_DATA function. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
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Siva Durga Prasad Paladugu authored
Added SHA to calculate SHA3 hash,RSA to encrypt data with public key and decrypt with private key and AES to do symmetric encryption with User key or device key. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
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Siva Durga Prasad Paladugu authored
psci system_reset and system_off calls now retrieve shutdown scope on the fly. The default scope is system, but it can be changed by calling pm_system_shutdown(2, scope) Until full support for different restart scopes becomes available with PSCI 1.1 this change allows users to set the reboot scope to match their application needs. Possible scope values: 0 - APU subsystem: does not affect RPU, PMU or PL 1 - PS only: shutdown/restart entire PS without affecting PL 2 - System: shutdown/restart applies to entire system Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Davorin Mista <davorin.mista@aggios.com>
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Filip Drazic authored
The PM_INIT_FINALIZE PM API is required to inform the PFW that APU is done with requesting nodes and that not-requested nodes can be powered down. If PM is not enabled, this call will never be made and PFW will never power down any of the nodes which APU can use. Signed-off-by: Filip Drazic <filip.drazic@aggios.com>
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Siva Durga Prasad Paladugu authored
This patch adds pm_secure_rsaaes() API to provide access to the xilsecure library for loading secure images Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
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Filip Drazic authored
Call to pm_client_wakeup from pm_req_wakeup prevented the PM API call to be used to wake up non-APU processor (e.g. from higher ELs), since it clears power down request for specified APU processor. Move this function out of pm_client_wakeup to allow passing wake up requests to the PMU for other processor in the system. Signed-off-by: Filip Drazic <filip.drazic@aggios.com> Acked-by: Will Wong <willw@xilinx.com>
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Anes Hadziahmetagic authored
pm_get_node_status API function returns 3 values: -status: Current power state of the node -requirements: Current requirements for the node -usage: Current usage of the node The last two values only apply to slave nodes. Signed-off-by: Anes Hadziahmetagic <anes.hadziahmetagic@aggios.com> Signed-off-by: Filip Drazic <filip.drazic@aggios.com> Acked-by: Will Wong <willw@xilinx.com>
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- 15 Mar, 2018 7 commits
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Jolly Shah authored
Various changes to comply with MISRA static analysis rules Signed-off-by: Jolly Shah <jollys@xilinx.com>
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Rajan Vaja authored
Add pin control APIs which driver can use to query pin information from firmware. Using these APIs, driver do not need to maintain hard-coded pin database. Major changes in patch are: - Add pin database with pins, functions and function groups information - Implement APIs for pin information queries - Update pin control APIs for get/set functions to use new pin control database. Remove pin database which was added earlier. Signed-off-by: Rajan Vaja <rajanv@xilinx.com> Signed-off-by: Jolly Shah <jollys@xilinx.com>
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Rajan Vaja authored
These are empty functions with no logic right now. Code will be added in subsequent commits. Signed-off-by: Rajan Vaja <rajanv@xilinx.com> Signed-off-by: Jolly Shah <jollys@xilinx.com>
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Rajan Vaja authored
Implement ioctl APIs which uses MMIO operations to control RPU operations. Below IOCTLs are supported in this patch: * Get RPU operation mode * Set RPU operation mode * Configure RPU boot address (OCM/TCM) * Configure TCM combined mode Signed-off-by: Rajan Vaja <rajanv@xilinx.com> Signed-off-by: Jolly Shah <jollys@xilinx.com>
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Rajan Vaja authored
Implement pin control APIs which uses MMIO operations to set/get values of configuration parameters. Signed-off-by: Rajan Vaja <rajanv@xilinx.com> Signed-off-by: Jolly Shah <jollys@xilinx.com>
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Rajan Vaja authored
Implement pin control APIs which uses MMIO operations to set/get functions for the given pin. Signed-off-by: Rajan Vaja <rajanv@xilinx.com> Signed-off-by: Jolly Shah <jollys@xilinx.com>
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Rajan Vaja authored
Add wrappers for pin control APIs. Actual implementation of these APIs would be done in subsequent changes. Signed-off-by: Rajan Vaja <rajanv@xilinx.com> Signed-off-by: Jolly Shah <jollys@xilinx.com>
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- 09 Jan, 2018 1 commit
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Wendy Liang authored
Use zynqmp_ipi APIs to access IPI registers in pm_service. As the zynqmp_ipi APIs doesn't cover IPI buffers, the pm_ipi in pm_service will still directly access the IPI buffers. Signed-off-by: Wendy Liang <jliang@xilinx.com>
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- 14 Jul, 2017 1 commit
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Isla Mitchell authored
This fix modifies the order of system includes to meet the ARM TF coding standard. There are some exceptions to this change in order to retain header groupings and where there are headers within #if statements. Change-Id: Ib5b668c992d817cc860e97b29e16ef106d17e404 Signed-off-by: Isla Mitchell <isla.mitchell@arm.com>
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- 03 May, 2017 1 commit
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dp-arm authored
To make software license auditing simpler, use SPDX[0] license identifiers instead of duplicating the license text in every file. NOTE: Files that have been imported by FreeBSD have not been modified. [0]: https://spdx.org/ Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761a Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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- 16 Nov, 2016 5 commits
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Soren Brinkmann authored
The callback IRQ is delivered to the NS OS. Provide an interface to allow the NS OS to obtain the callback data from the secure HW. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
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Soren Brinkmann authored
The IPI hardware is secure and managed by ATF, nevertheless we deliver the IRQ to the rich OS. The IRQ is needed to receive PM callbacks. Enable the IPI interrupt when the rich OS probes the API version. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
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Soren Brinkmann authored
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
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Soren Brinkmann authored
Use the PMUFW get_chipid call to obtain IDCODE and version register. Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
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Soren Brinkmann authored
Allow reading more than just a single value from the message buffer. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
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- 13 Sep, 2016 4 commits
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Soren Brinkmann authored
We must guarantee that writes have become effective before returning to the caller. Hence, wait for PMUFW signaling completion of the FW call before returning to the rich OS. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
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Nava kishore Manne authored
This patch adds pm_fpga_load() and pm_fpga_get_status() API's to provide the Access to the xilfpga library to load the bitstream into zynqmp PL region. Signed-off-by: Nava kishore Manne <navam@xilinx.com>
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Filip Drazic authored
During system suspend, identify slaves which are configured as wake sources and call pm_set_wakeup_source API for each of them. Identifying if device may wake the system is done by checking if any interrupt of that device is enabled in GICD_ISENABLER when the APU is about to enter SUSPEND_TO_RAM state. If such interrupt is found, pm_set_wakeup_source is called with corresponding PM node ID as argument. Signed-off-by: Filip Drazic <filip.drazic@aggios.com>
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Filip Drazic authored
The state argument of the pm_self_suspend API encodes the state to which the APU intends to suspend. The state can be: - PM_APU_STATE_CPU_IDLE - processor power down, all memories remain on - PM_APU_STATE_SUSPEND_TO_RAM - all processors powered down, L2$ powered down, all OCM banks in retention and DDR in self-refresh. The calls for setting requirements for L2$ and OCM banks are now redundant and removed. Signed-off-by: Filip Drazic <filip.drazic@aggios.com> [ sb - remove redundant #defines ] Signed-off-by: Sören Brinkmann <soren.brinkmann@xilinx.com>
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- 24 May, 2016 3 commits
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Anes Hadziahmetagic authored
Signed-off-by: Anes Hadziahmetagic <anes.hadziahmetagic@aggios.com> Signed-off-by: Filip Drazic <filip.drazic@aggios.com> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
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Anes Hadziahmetagic authored
Signed-off-by: Anes Hadziahmetagic <anes.hadziahmetagic@aggios.com> Signed-off-by: Filip Drazic <filip.drazic@aggios.com> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
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Filip Drazic authored
Functions pm_ipi_send and pm_ipi_send_sync are declared in pm_ipi.h Signed-off-by: Filip Drazic <filip.drazic@aggios.com> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
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- 06 Apr, 2016 1 commit
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Soren Brinkmann authored
The Xilinx Zynq UltraScale+ MPSOC containes a quad A53 cluster. This patch adds the platform port for that SoC. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
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