- 22 Feb, 2017 1 commit
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Varun Wadekar authored
The Flow Controller hardware block is not present across all Tegra SoCs, hence include the driver files from SoC specific makefiles. T132/T210 are the SoCs which include this hardware block while future SoCs have removed it. Change-Id: Iaca25766a4fa51567293d10cf14dae968b0fae80 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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- 31 Jul, 2015 1 commit
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Varun Wadekar authored
The TZDRAM base on the reference platform has been bumped up due to some BL2 memory cleanup. Platforms can also use a different TZDRAM base by setting TZDRAM_BASE=<value> in the build command line. Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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- 24 Jul, 2015 2 commits
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Varun Wadekar authored
This patch implements support for T132 (Denver CPU) based Tegra platforms. The following features have been added: * SiP calls to switch T132 CPU's AARCH mode * Complete PSCI support, including 'System Suspend' * Platform specific MMIO settings * Locking of CPU vector registers Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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Varun Wadekar authored
This patch moves the inclusion of CPU code (A53, A57) to T210's makefile. This way we can reduce code size for Tegra platforms by including only the required CPU files. Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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- 17 Jul, 2015 1 commit
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Varun Wadekar authored
A new config, ENABLE_NS_L2_CPUECTRL_RW_ACCESS, allows Tegra platforms to enable read/write access to the L2 and CPUECTRL registers. T210 is the only platform that needs to enable this config for now. Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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- 29 May, 2015 1 commit
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Varun Wadekar authored
T210 is the latest chip in the Tegra family of SoCs from NVIDIA. It is an ARM v8 dual-cluster (A57/A53) SoC, with any one of the clusters being active at a given point in time. This patch adds support to boot the Trusted Firmware on T210 SoCs. The patch also adds support to boot secondary CPUs, enter/exit core power states for all CPUs in the slow/fast clusters. The support to switch between clusters is still not available in this patch and would be available later. Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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- 28 Apr, 2015 1 commit
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Dan Handley authored
This major change pulls out the common functionality from the FVP and Juno platform ports into the following categories: * (include/)plat/common. Common platform porting functionality that typically may be used by all platforms. * (include/)plat/arm/common. Common platform porting functionality that may be used by all ARM standard platforms. This includes all ARM development platforms like FVP and Juno but may also include non-ARM-owned platforms. * (include/)plat/arm/board/common. Common platform porting functionality for ARM development platforms at the board (off SoC) level. * (include/)plat/arm/css/common. Common platform porting functionality at the ARM Compute SubSystem (CSS) level. Juno is an example of a CSS-based platform. * (include/)plat/arm/soc/common. Common platform porting functionality at the ARM SoC level, which is not already defined at the ARM CSS level. No guarantees are made about the backward compatibility of functionality provided in (include/)plat/arm. Also remove any unnecessary variation between the ARM development platform ports, including: * Unify the way BL2 passes `bl31_params_t` to BL3-1. Use the Juno implementation, which copies the information from BL2 memory instead of expecting it to persist in shared memory. * Unify the TZC configuration. There is no need to add a region for SCP in Juno; it's enough to simply not allow any access to this reserved region. Also set region 0 to provide no access by default instead of assuming this is the case. * Unify the number of memory map regions required for ARM development platforms, although the actual ranges mapped for each platform may be different. For the FVP port, this reduces the mapped peripheral address space. These latter changes will only be observed when the platform ports are migrated to use the new common platform code in subsequent patches. Change-Id: Id9c269dd3dc6e74533d0e5116fdd826d53946dc8
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- 31 Mar, 2015 1 commit
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Varun Wadekar authored
TLK Dispatcher (tlkd) is based on the tspd and is the glue required to run TLK as a Secure Payload with the Trusted Firmware. Change-Id: I69e573d26d52342eb049feef773dd7d2a506f4ab Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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- 20 Aug, 2014 1 commit
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Soby Mathew authored
This patch introduces a framework which will allow CPUs to perform implementation defined actions after a CPU reset, during a CPU or cluster power down, and when a crash occurs. CPU specific reset handlers have been implemented in this patch. Other handlers will be implemented in subsequent patches. Also moved cpu_helpers.S to the new directory lib/cpus/aarch64/. Change-Id: I1ca1bade4d101d11a898fb30fea2669f9b37b956
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- 06 May, 2014 2 commits
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Dan Handley authored
Remove all usage of the vpath keyword in makefiles as it was prone to mistakes. Specify the relative paths to source files instead. Also reorder source files in makefiles alphabetically. Fixes ARM-software/tf-issues#121 Change-Id: Id15f60655444bae60e0e2165259efac71a50928b
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Dan Handley authored
Move almost all system include files to a logical sub-directory under ./include. The only remaining system include directories not under ./include are specific to the platform. Move the corresponding source files to match the include directory structure. Also remove pm.h as it is no longer used. Change-Id: Ie5ea6368ec5fad459f3e8a802ad129135527f0b3
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- 26 Mar, 2014 1 commit
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Sandrine Bailleux authored
bl1/aarch64/early_exceptions.S used to be re-used by BL2, BL3-1 and BL3-2. There was some early SMC handling code in there that was not required by the other bootloader stages. Therefore this patch introduces an even simpler exception vector source file for BL2, BL3-1 and BL3-2. Fixes ARM-software/tf-issues#38 Change-Id: I0244b80e9930b0f8035156a0bf91cc3e9a8f995d
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- 20 Mar, 2014 1 commit
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Jeenu Viswambharan authored
At present, the entry point for each BL image is specified via the Makefiles and provided on the command line to the linker. When using a link script the entry point should rather be specified via the ENTRY() directive in the link script. This patch updates linker scripts of all BL images to specify the entry point using the ENTRY() directive. It also removes the --entry flag passed to the linker through Makefile. Fixes issue ARM-software/tf-issues#66 Change-Id: I1369493ebbacea31885b51185441f6b628cf8da0
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- 05 Mar, 2014 1 commit
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Jon Medhurst authored
This change requires all platforms to now specify a list of source files rather than object files. New source files should preferably be specified by using the path as well and we should add this in the future for all files so we can remove use of vpath. This is desirable because vpath hides issues like the fact that BL2 currently pulls in a BL1 file bl1/aarch64/early_exceptions.S and if in the future we added bl2/aarch64/early_exceptions.S then it's likely only one of the two version would be used for both bootloaders. This change also removes the 'dump' build target and simply gets bootloaders to always generate a dump file. At the same time the -x option is added so the section headers and symbols table are listed. Fixes ARM-software/tf-issues#11 Change-Id: Ie38f7be76fed95756c8576cf3f3ea3b7015a18dc Signed-off-by: Jon Medhurst <tixy@linaro.org>
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- 20 Feb, 2014 1 commit
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Achin Gupta authored
This patch factors out the ARM FVP specific code to create MMU translation tables so that it is possible for a boot loader stage to create a different set of tables instead of using the default ones. The default translation tables are created with the assumption that the calling boot loader stage executes out of secure SRAM. This might not be true for the BL3_2 stage in the future. A boot loader stage can define the `fill_xlation_tables()` function as per its requirements. It returns a reference to the level 1 translation table which is used by the common platform code to setup the TTBR_EL3. This patch is a temporary solution before a larger rework of translation table creation logic is introduced. Change-Id: I09a075d5da16822ee32a411a9dbe284718fb4ff6
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- 20 Jan, 2014 2 commits
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Ryan Harkin authored
Tidy up the spacing of variable definitions within the makefiles to make them more consistent, easier to read and amend. Change-Id: Ic6d7c8489ca4330824abb5cd1ead8f1d449d1a85 Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
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Ryan Harkin authored
Move all explicit platform or architecture specific references into a new platform.mk file that is defined for each platform. Change-Id: I9d6320d1ba957e0cc8d9b316b3578132331fa428 Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
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- 17 Jan, 2014 1 commit
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Dan Handley authored
Change-Id: Ic7fb61aabae1d515b9e6baf3dd003807ff42da60
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- 20 Dec, 2013 1 commit
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Harry Liebel authored
- This change is split into two separate patches in order to simplify the history as interpreted by 'git'. The split is between the move/rename and addition of new files. - Remove dependency on toolchain C library headers and functions in order to ensure behavioural compatibility between toolchains. - Use FreeBSD as reference for C library implementation. - Do not let GCC use default library include paths. - Remove unused definitions in modified headers and implementations. - Move C library files to 'lib/stdlib' and 'include/stdlib'. - Break std.c functions out into separate files. Change-Id: I91cddfb3229775f770ad781589670c57d347a154
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- 05 Dec, 2013 1 commit
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Dan Handley authored
- Add instructions for contributing to ARM Trusted Firmware. - Update copyright text in all files to acknowledge contributors. Change-Id: I9311aac81b00c6c167d2f8c889aea403b84450e5
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- 25 Oct, 2013 1 commit
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Achin Gupta authored
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