- 22 Aug, 2018 2 commits
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Antonio Nino Diaz authored
tf_printf and tf_snprintf are now called printf and snprintf, so the code needs to be updated. Change-Id: Iffeee97afcd6328c4c2d30830d4923b964682d71 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
The codebase was using non-standard headers. It is needed to replace them by the correct ones so that we can use the new libc headers. Change-Id: I530f71d9510cb036e69fe79823c8230afe890b9d Acked-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 21 Aug, 2018 1 commit
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Roberto Vargas authored
All the arm platforms were including the files related to mem-protect. This configuration generates some problems with new platforms that don't support such functionality, and for that reason this patch moves these files to the platform specific makefiles. Change-Id: I6923e5224668b76667795d8e11723cede7979b1e Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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- 20 Aug, 2018 1 commit
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Jeenu Viswambharan authored
These changes address most of the required MISRA rules. In the process, some from generic code is also fixed. No functional changes. Change-Id: I707dbec9b34b802397e99da2f5ae738165d6feba Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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- 17 Aug, 2018 1 commit
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Antonio Nino Diaz authored
Change-Id: If53b5b2430a06ce8cf6e7948765b560b37afc335 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 15 Aug, 2018 2 commits
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Antonio Nino Diaz authored
The Raspberry Pi 3 port doesn't actually depend on any Arm platform code, so the dependencies can be removed. Change-Id: Ic2f47f5001bebde3862815b1d880a169d82b3f65 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Daniel Boulby authored
This function is required for platforms where COLD_BOOT_SINGLE_CPU=0 however it was missing from rockchip platforms Change-Id: I32a85f226a4f22085a27113903f34bdb6f28dbcc Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
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- 10 Aug, 2018 6 commits
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Antonio Nino Diaz authored
Change-Id: I3d16b247a0fa457e6293e2d2c4503dfde1e51c1d Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Change-Id: I1bb310e1b05968d30b28913c4011c0601e1ae64e Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
The translation library is useful elsewhere. Even though this repository doesn't exercise the EL2 support of the library, it is better to have it here as well to make it easier to maintain. enable_mmu_secure() and enable_mmu_direct() have been deprecated. The functions are still present, but they are behind ERROR_DEPRECATED and they call the new functions enable_mmu_svc_mon() and enable_mmu_direct_svc_mon(). Change-Id: I13ad10cd048d9cc2d55e0fff9a5133671b67dcba Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Haojian Zhuang authored
Migrate from emmc framework to mmc framework. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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Haojian Zhuang authored
Migrate to mmc framework. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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Antonio Nino Diaz authored
Functions provided by stdio.h such as printf and sprintf are available in the codebase, but they add a lot of code to the final image if they are used: - AArch64: ~4KB - AArch32: ~2KB in T32, ~3KB in A32 tf_printf and tf_snprintf are a lot more simple, but it is preferable to use them when possible because they are also used in common code. Change-Id: Id09fd2b486198fe3d79276e2c27931595b7ba60e Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 06 Aug, 2018 1 commit
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Roberto Vargas authored
Change-Id: Idb9ba3864d6de3053260724f07172fd32c1523e0 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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- 03 Aug, 2018 7 commits
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Nariman Poushin authored
Add support for System Guidance for Mobile platform SGM775 Change-Id: I2442a50caae8f597e5e5949cd48f695cf75d9653 Signed-off-by: Nariman Poushin <nariman.poushin@linaro.org>
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Deepak Pandey authored
In css platforms where the cpu/cluster management is done by the hardware, software does need to issue certain scmi requests. This patch wraps those scmi calls around the HW_ASSISTED_COHERENCY build option to remove them on platforms that have this hardware support. Change-Id: Ie818e234484ef18549aa7f977aef5c3f0fc26c27 Signed-off-by: Deepak Pandey <Deepak.Pandey@arm.com> Signed-off-by: Amit Daniel Kachhap <amit.kachhap@arm.com> Signed-off-by: Nariman Poushin <nariman.poushin@linaro.org>
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Nariman Poushin authored
This omission causes a build error as the definition for arm_tzc_regions_info_t is needed from plat_arm.h Change-Id: I26935ee90d3e36ab6a016ff2c4eee4413df3e4e8 Signed-off-by: Nariman Poushin <nariman.poushin@linaro.org>
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Nariman Poushin authored
Change-Id: I278d6876508800abff7aa2480910306a24de5378 Signed-off-by: Nariman Poushin <nariman.poushin@linaro.org>
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Chandni Cherukuri authored
The Arm SGI platforms can switch to using SCMI. So enable support for SCMI and remove portions of code that would be unused after switching to SCMI. Change-Id: Ifd9e1c944745f703da5f970b5daf1be2b07ed14e Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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Chandni Cherukuri authored
On SGI platforms, the 'CORE_PWRDN_EN' bit of 'CPUPWRCTLR_EL1' register requires an explicit write to clear it for hotplug and idle to function correctly. The reset value of this bit is zero but it still requires this explicit clear to zero. This indicates that this could be a model related issue but for now this issue can be fixed be clearing the CORE_PWRDN_EN in the platform specific reset handler function. Change-Id: I4222930daa9a3abacdace6b7c3f4a5472ac0cb19 Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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Roberto Vargas authored
TF Makefile was linking all the objects files generated for the fdt library instead of creating a static library that could be used in the linking stage. Change-Id: If3705bba188ec39e1fbf2322a7f2a9a941e1b90d Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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- 01 Aug, 2018 1 commit
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Daniel Boulby authored
TF won't build since no memory region is specified for when SEPARATE_CODE_AND_RODATA=0 it still relies on the ARM_MAP_BL_RO_DATA region which is never defined for this case. Create memory region combining code and RO data for when the build flag SEPARATE_CODE_AND_RODATA=0 to fix this Change-Id: I6c129eb0833497710cce55e76b8908ce03e0a638 Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
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- 30 Jul, 2018 1 commit
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Antonio Nino Diaz authored
Fix defects of MISRA C-2012 rules 8.13, 10.1, 10.3, 10.4, 10.8, 11.6, 14.4, 15.7, 17.8, 20.10, 20.12, 21.1 and Directive 4.9. Change-Id: I7ff61e71733908596dbafe2e99d99b4fce9765bd Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 27 Jul, 2018 1 commit
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Kaihua Zhong authored
GPIO_089 connects to PCIE_PERST_N. It needs to be configured as output low. Signed-off-by: Kaihua Zhong <zhongkaihua@huawei.com> Signed-off-by: Xiaowei Song <songxiaowei@hisilicon.com> Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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- 26 Jul, 2018 8 commits
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Andrew F. Davis authored
We can enter and exit coherency without any software operations, but HW_ASSISTED_COHERENCY has stronger implications that are causing issues. Until these can be resolved, only use the weaker WARMBOOT_ENABLE_DCACHE_EARLY flag. Signed-off-by: Andrew F. Davis <afd@ti.com>
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Sughosh Ganu authored
Add the various flags that are required to build the components needed to enable the RAS feature on SGI575 platform. By default, all flags are set to 0, disabling building of all corresponding components. Change-Id: I7f8536fba895043ef6e397cc33ac9126cb572132 Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
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Sughosh Ganu authored
Add platform specific changes needed to add support for the RAS feature on SGI575 platform, including adding a mapping for the CPER buffer being used on SGI575 platform. Change-Id: I01a982e283609b5c48661307906346fa2738a43b Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
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Sughosh Ganu authored
Add a platform specific handler for RAS interrupts and configure the platform RAS interrupts for EL3 handling. The interrupt handler passes control to StandaloneMM code executing in S-EL0, which populates the CPER buffer with relevant error information. The handler subsequently invokes the SDEI client which processes the information in the error information in the CPER buffer. The helper functions plat_sgi_get_ras_ev_map and plat_sgi_get_ras_ev_map_size would be defined for sgi platforms in the subsequent patch, which adds sgi575 specific RAS changes. Change-Id: I490f16c15d9917ac40bdc0441659b92380108d63 Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
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Sughosh Ganu authored
The secure partition manager reserves chunks of memory which are used for the S-EL0 StandaloneMM image and the buffers required for communication between the Non-Secure world with the StandaloneMM image. Add the memory chunks to relevant arrays for mapping the regions of memory with corresponding attributes. Change-Id: If371d1afee0a50ca7cacd55e16aeaca949d5062b Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
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Sughosh Ganu authored
The SGI platforms need to allocate memory for CPER buffers. These platform buffers would be placed between the shared reserved memory and the per cpu stack memory, thus the need to redefine stack base pointer for these platforms. This patch allows each board in ARM platform to define the PLAT_SP_IMAGE_STACK_BASE. Change-Id: Ib5465448b860ab7ab0f645f7cb278a67acce7be9 Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
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Sughosh Ganu authored
Include arm_spm_def.h in the platform_def.h file. Without this inclusion, we get build errors like In file included from services/std_svc/spm/sp_setup.c:12:0: services/std_svc/spm/sp_setup.c: In function 'spm_sp_setup': services/std_svc/spm/sp_setup.c:61:57: error: 'PLAT_SPM_BUF_BASE' undeclared (first use in this function) write_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_X0, PLAT_SPM_BUF_BASE); Now that the platform_def.h includes arm_spm_def.h, remove inclusion of platform_def.h in arm_spm_def.h to remove the circular dependency. Change-Id: I5225c8ca33fd8d288849524395e436c3d56daf17 Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
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Sughosh Ganu authored
The board_arm_def.h header file needs to be included via the platform definition header. Not doing so, results in a redefinition error of PLAT_ARM_MAX_BL31_SIZE macro, if defined in the platform definition file. Change-Id: I1d178f6e8a6a41461e7fbcab9f6813a2faa2d82b Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
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- 24 Jul, 2018 8 commits
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Yann Gautier authored
platform.mk is updated to have compilation rules for DTB, stm32image tool, and the concatenation of the 3 binaries. A new linker script and an assembly file are added to manage this. Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Mathieu Belou <mathieu.belou@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
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Yann Gautier authored
Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Mathieu Belou <mathieu.belou@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
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Yann Gautier authored
The DDR driver is under dual license, BSD and GPLv2. The configuration parameters are taken from device tree. Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
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Yann Gautier authored
If a PMIC companion chip is present on board, it has to be configured for regulators supplies. This check is done with board DT configuration. Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Pascal Paillet <p.paillet@st.com>
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Yann Gautier authored
Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
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Yann Gautier authored
This will be used by BL33 to get boot device and instance. Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Mathieu Belou <mathieu.belou@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
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Yann Gautier authored
The management of pinctrl nodes of device tree is also added. Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Mathieu Belou <mathieu.belou@st.com> Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
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Yann Gautier authored
The clock driver is under dual license, BSD and GPLv2. The clock driver uses device tree, so a minimal support for this is added. The required files for driver and DTS files are in include/dt-bindings/. Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
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