- 14 Feb, 2019 3 commits
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Yann Gautier authored
Include all RCC, clocks and reset headers from stm32mp1_def.h which if exported to the firmware through platform_def.h. The same dependency removal is done in common code as well. Some useless includes are also removed in stm32_sdmmc2 driver. Change-Id: I731ea5775c3fdb7f7b0c388b93923ed5e84b8d3f Signed-off-by: Yann Gautier <yann.gautier@st.com>
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Yann Gautier authored
Mainly remove suffix 1 from prefix stm32mp1 in several macros and functions that can be used in drivers shared by different platforms. Change-Id: I2295c44f5b1edac7e80a93c0e8dfd671b36e88e7 Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
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Yann Gautier authored
Some parts of code could be shared with platform derivatives, or new platforms. A new folder plat/st/common is created to put common parts. stm32mp_common.h is a common API aggregate. Remove some casts where applicable. Fix some types where applicable. Remove also some platform includes that are already in stm32mp1_def.h. Change-Id: I46d763c8d9e15732d1ee7383207fd58206d7f583 Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
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- 13 Feb, 2019 1 commit
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Loh Tien Hock authored
This is to add simple MBR partition entry support. This will read all four MBR partition into the partition list, and the partition type will be saved in the list.name[0] entry. Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>
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- 12 Feb, 2019 1 commit
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Ying-Chun Liu (PaulLiu) authored
This commit migrates to MULTI_CONSOLE_API for IMX Warp7 board. We also rename the functions in imx_uart driver to more specific one. Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
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- 06 Feb, 2019 1 commit
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Antonio Nino Diaz authored
The Generic Timer is an optional extension to an ARMv7-A implementation. The generic delay timer can be used from any architecture supported by the Trusted Firmware. In ARMv7 it is needed to check that this feature is present. In ARMv8 it is always present. Change-Id: Ib7e8ec13ffbb2f64445d4ee48ed00f26e34b79b7 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 04 Feb, 2019 1 commit
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Soby Mathew authored
Previously the GICv3 redistributor probe function (gicv3_rdistif_base_addrs_probe()) asserted that the number of per-CPU redistributor interfaces expected to be probed by the platform is equal to the number exported by the redistributor frame. This is a problem in case the number of CPUs in the platform is less than the number of redistributor interfaces in the frame. Hence this patch removes the assertion check and allows probe for fewer redistributor interfaces as required by the platform. Change-Id: I3449763a3ad70817224442cbe184d001030c9874 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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- 31 Jan, 2019 1 commit
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Ying-Chun Liu (PaulLiu) authored
This commit adds SDHost driver for RaspberryPi3. SDHost driver uses the GPIO driver to connect the SDCard and SDHost. By using this driver it is able to read/write raw blocks on SDCard. Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
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- 29 Jan, 2019 3 commits
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Marek Vasut authored
Clean up the NOTICE() and FATAL_MSG() outputs, so that they contain proper newlines and BL2 prefixes. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
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Sergii Boryshchenko authored
Method cpld_reset_cpu of bl31 is called from the Linux kernel and uses GPIO6, GPIO2 pins as SPI bus lines to control the CPLD device. But in the kernel GPIO6_8 pin are initialized to work in interrupt mode instead of the input/output mode. This leads to the fact that the SPI bus becomes non-functional. In this patch we switch the GPIO6_8 pin back to the input-output mode. Signed-off-by: Sergii Boryshchenko <sergii.boryshchenko@globallogic.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
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Marek Vasut authored
The ATF code fails to build with PMIC_ROHM_BD9571=0, add the missing function into the PWRC code. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
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- 27 Jan, 2019 1 commit
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Florian La Roche authored
Signed-off-by: Florian La Roche <Florian.LaRoche@gmail.com>
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- 25 Jan, 2019 8 commits
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Joel Hutton authored
Change-Id: I2d67bb1bebd15e6a7d69ea5e7b6fda9c972f9d86 Signed-off-by: Joel Hutton <Joel.Hutton@Arm.com>
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Ying-Chun Liu (PaulLiu) authored
This commit adds GPIO driver for RaspberryPi3. The GPIO driver for RPi3 also provides the way to do pinmux selections. Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
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Antonio Nino Diaz authored
Change-Id: I670ea80e0331c2d4b2ccfa563a45469a43f6902d Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Change-Id: Ia601d5ad65ab199e747fb60af4979b7db477d249 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Change-Id: Ida5dae39478654405d0ee31a6cbddb4579e76a7f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Change-Id: Icc59cdaf2b56f6936e9847f1894594c671db2e94 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Change-Id: I656753a1825ea7340a3708b950fa6b57455e9056 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Change-Id: I8989d2aa0258bf3b50a856c5b81532d578600124 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 18 Jan, 2019 7 commits
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Yann Gautier authored
The BSEC (Boot and Security and OTP control) is intended to control an OTP (one time programmable) fuse box, used for on-chip non-volatile storage for device configuration and security parameters. Change-Id: I38c44684c7b9c6a1f24ec0ae3fe99cec481d5a51 Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Signed-off-by: Mathieu Belou <mathieu.belou@st.com> Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
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Yann Gautier authored
Change fdt_check_status function to fdt_get_status. Update GPIO defines. Move some functions in gpio driver, instead of dt helper file. Add GPIO bank helper functions. Use only one status field in dt_node_info structure including both status and secure status. Change-Id: I34f93408dd4aac16ae722f564bc3f7d6ae978cf4 Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
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Yann Gautier authored
Reword some traces. Use uintptr_t where required. Reduce scope of variables. Improve io_stm32image algo. Complete some IP registers definitions. Add failure on supported DDR (stm32mp1_ddr_init()). Fix cache flush on cache disable (stm32mp1_ddr_setup). Change-Id: Ie02fa71e02b9d69abc807fd5b7df233e5be6668c Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
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Yann Gautier authored
Change-Id: I4a1b281925e0a3a1e2a34b3e363537e4a7f13823 Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
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Yann Gautier authored
The drivers are also updated to reflect the changes. Set RCC as non-secure. Change-Id: I568fa1f418355830ad1d4d1cdcdb910fb362231b Signed-off-by: Yann Gautier <yann.gautier@st.com>
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Yann Gautier authored
This is the correct name of the IP. Rename stm32mp1_pmic files to stm32mp_pmic. Change-Id: I238a7d1f9a1d099daf7788dc9ebbd3146ba2f15f Signed-off-by: Yann Gautier <yann.gautier@st.com>
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Yann Gautier authored
The driver could be used for other devices than PMIC. Change-Id: I4569e7c0028e52e1ff2fe9d38f11de11e95d1897 Signed-off-by: Yann Gautier <yann.gautier@st.com>
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- 17 Jan, 2019 1 commit
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Yann Gautier authored
In patch 93768644 , ret will be MMC_STATE_TRAN (=4), which is a valid value. We shouldn't exit the function in that case, but only if ret is < 0. Change-Id: I776693fe847b6b45190af028f12d2e724ca46399 Signed-off-by: Yann Gautier <yann.gautier@st.com>
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- 15 Jan, 2019 1 commit
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Paul Beesley authored
Corrects typos in core code, documentation files, drivers, Arm platforms and services. None of the corrections affect code; changes are limited to comments and other documentation. Change-Id: I5c1027b06ef149864f315ccc0ea473e2a16bfd1d Signed-off-by: Paul Beesley <paul.beesley@arm.com>
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- 08 Jan, 2019 11 commits
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Marek Vasut authored
Replace the ad-hoc implementation of delay in PWRC driver with common R-Car delay code. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
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Marek Vasut authored
Rewrite the delay code from assembler to C. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
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Marek Vasut authored
Use the SCIF SCFSR:TEND bit to check that all data were transmitted by the SCIF and that there are no more valid data to transmit in the FIFO. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
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Marek Vasut authored
Synchronize the QoS tables with Renesas ATF release 2.0.0 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
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Marek Vasut authored
Synchronize the pin control tables with Renesas ATF release 2.0.0 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
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Marek Vasut authored
Synchronize the R-Car DDR-B driver, used on R-Car H3/M3W/M3N, with Renesas ATF release 2.0.0 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
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Marek Vasut authored
Run Linux kernel checkpatch on the DDR-A init code to clean it up: $ checkpatch.pl --fix --fix-inplace -f drivers/staging/renesas/rcar/ddr/ddr_a/* Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
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Marek Vasut authored
Synchronize the R-Car DDR-A driver, used on R-Car E3, with Renesas ATF release 2.0.0 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
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Marek Vasut authored
Move the rcar_cpld_reset_cpu() function into header file and zap the externs. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
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Marek Vasut authored
The code runs in EL3, use EL3 accessors to manipulate the interrupt bit. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
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Marek Vasut authored
The code runs in EL3, use EL3 accessors to manipulate the cache bits. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
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