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  1. 02 Jun, 2021 1 commit
    • Pali Rohár's avatar
      fix(plat/marvell/a3720/uart): fix UART parent clock rate determination · 5a91c439
      Pali Rohár authored 
      

The UART code for the A3K platform assumes that UART parent clock rate
is always 25 MHz. This is incorrect, because the xtal clock can also run
at 40 MHz (this is board specific).

The frequency of the xtal clock is determined by a value on a strapping
pin during SOC reset. The code to determine this frequency is already in
A3K's comphy driver.

Move the get_ref_clk() function from the comphy driver to a separate
file and use it for UART parent clock rate determination.
Signed-off-by: default avatarPali Rohár <pali@kernel.org>
Change-Id: I8bb18a2d020ef18fe65aa06ffa4ab205c71be92e
      5a91c439
  3. 01 Jun, 2021 2 commits
  5. 28 May, 2021 1 commit
    • Pali Rohár's avatar
      fix(plat/marvell/a3720/uart): fix UART clock rate value and divisor calculation · 66a77528
      Pali Rohár authored 
      

UART parent clock is by default the platform's xtal clock, which is
25 MHz.

The value defined in the driver, though, is 25.8048 MHz. This is a hack
for the suboptimal divisor calculation
  Divisor = UART clock / (16 * baudrate)
which does not use rounding division, resulting in a suboptimal value
for divisor if the correct parent clock rate was used.

Change the code for divisor calculation to
  Divisor = Round(UART clock / (16 * baudrate))
and change the parent clock rate value to 25 MHz.

The final UART divisor for default baudrate 115200 is not affected by
this change.

(Note that the parent clock rate should not be defined via a macro,
since the xtal clock can also be 40 MHz. This is outside of the scope of
this fix, though.)
Signed-off-by: default avatarPali Rohár <pali@kernel.org>
Change-Id: Iaa401173df87aec94f2dd1b38a90fb6ed0bf0ec6
      66a77528
  7. 27 Apr, 2021 1 commit
    • Pali Rohár's avatar
      plat: marvell: armada: a3k: Add new compile option A3720_DB_PM_WAKEUP_SRC · f2800a47
      Pali Rohár authored 
      

This new compile option is only for Armada 3720 Development Board. When
it is set to 1 then TF-A will setup PM wake up src configuration.

By default this new option is disabled as it is board specific and no
other A37xx board has PM wake up src configuration.

Currently neither upstream U-Boot nor upstream Linux kernel has wakeup
support for A37xx platforms, so having it disabled does not cause any
issue.

Prior this commit PM wake up src configuration specific for Armada 3720
Development Board was enabled for every A37xx board. After this change it
is enabled only when compiling with build flag A3720_DB_PM_WAKEUP_SRC=1
Signed-off-by: default avatarPali Rohár <pali@kernel.org>
Change-Id: I09fea1172c532df639acb3bb009cfde32d3c5766
      f2800a47
  9. 29 Jan, 2021 9 commits
  11. 28 Jan, 2021 1 commit
  13. 11 Jan, 2021 1 commit
    • Marek Behún's avatar
      plat: marvell: armada: a3k: improve 4GB DRAM usage from 3.375 GB to 3.75 GB · b04921f7
      Marek Behún authored 
      

The current configuration of CPU windows on Armada 37x0 with 4 GB DRAM
can only utilize 3.375 GB of memory. This is because there are only 5
configuration windows, configured as such (in hexadecimal, also showing
ranges not configurable by CPU windows):

         0 - 80000000 |   2 GB | DDR  | CPU window 0
  80000000 - C0000000 |   1 GB | DDR  | CPU window 1
  C0000000 - D0000000 | 256 MB | DDR  | CPU window 2
  D0000000 - D2000000 |  32 MB |      | Internal regs
      empty space     |        |      |
  D8000000 - D8010000 |  64 KB |      | CCI regs
      empty space     |        |      |
  E0000000 - E8000000 | 128 MB | DDR  | CPU window 3
  E8000000 - F0000000 | 128 MB | PCIe | CPU window 4
      empty space     |        |      |
  FFF00000 - end      |  64 KB |      | Boot ROM

This can be improved by taking into account that:
- CCI window can be moved (the base address is only hardcoded in TF-A;
  U-Boot and Linux will not break with changing of this address)
- PCIe window can be moved (upstream U-Boot can change device-tree
  ranges of PCIe if PCIe window is moved)

Change the layout after the Internal regs as such:

  D2000000 - F2000000 | 512 MB | DDR  | CPU window 3
  F2000000 - FA000000 | 128 MB | PCIe | CPU window 4
      empty space     |        |      |
  FE000000 - FE010000 |  64 KB |      | CCI regs
      empty space     |        |      |
  FFF00000 - end      |  64 KB |      | Boot ROM

(Note that CCI regs base address is moved from D8000000 to FE000000 in
 all cases, not only for the configuration with 4 GB of DRAM. This is
 because TF-A is built with this address as a constant, so we cannot
 change this address at runtime only on some boards.)

This yields 3.75 GB of usable RAM.

Moreover U-Boot can theoretically reconfigure the PCIe window to DDR if
it discovers that no PCIe card is connected. This can add another 128 MB
of DRAM (resulting only in 128 MB of DRAM not being used).
Signed-off-by: default avatarMarek Behún <marek.behun@nic.cz>
Change-Id: I4ca1999f852f90055fac8b2c4f7e80275a13ad7e
      b04921f7
  15. 07 Jan, 2021 1 commit
    • Pali Rohár's avatar
      Makefile: Do not mark file targets as .PHONY target · a9812206
      Pali Rohár authored 
      

Only non-file targets should be set a .PHONY. Otherwise if file target is
set as .PHONY then targets which depends on those file .PHONY targets would
be always rebuilt even when their prerequisites are not changed.

File target which needs to be always rebuilt can be specified in Make
system via having a prerequisite on some .PHONY target, instead of marking
whole target as .PHONY. In Makefile projects it is common to create empty
.PHONY target named FORCE for this purpose.

This patch changes all file targets which are set as .PHONY to depends on
new .PHONY target FORCE, to ensure that these file targets are always
rebuilt (as before). Basically they are those targets which calls external
make subprocess.

After FORCE target is specified in main Makefile, remove it from other
Makefile files to prevent duplicate definitions.
Signed-off-by: default avatarPali Rohár <pali@kernel.org>
Change-Id: Iee3b4e0de93879b95eb29a1745a041538412e69e
      a9812206
  17. 05 Jan, 2021 1 commit
    • Marek Behún's avatar
      plat: marvell: armada: a3k: support doing system reset via CM3 secure coprocessor · d9243f26
      Marek Behún authored 
      

Introduce a new build option CM3_SYSTEM_RESET for A3700 platform, which,
when enabled, adds code to the PSCI reset handler to try to do system
reset by the WTMI firmware running on the Cortex-M3 secure coprocessor.
(This function is exposed via the mailbox interface.)

The reason is that the Turris MOX board has a HW bug which causes reset
to hang unpredictably. This issue can be solved by putting the board in
a specific state before reset.
Signed-off-by: default avatarMarek Behún <marek.behun@nic.cz>
Change-Id: I3f60b9f244f334adcd33d6db6a361fbc8b8d209f
      d9243f26
  19. 07 Dec, 2020 8 commits
  21. 19 Nov, 2020 2 commits
    • Pali Rohár's avatar
      plat: marvell: armada: Add new target mrvl_bootimage · 91bc2da7
      Pali Rohár authored 
      

This new target builds boot-image.bin binary as described in documentation.
This image does not contain WTMI image and therefore WTP repository is not
required for building.

Having ability to build just this boot-image.bin binary without full
flash-image.bin is useful for A3720 Turris MOX board which does not use
Marvell's WTP and a3700_utils.

To reduce duplicity between a8k and a3k code, define this new target and
also definitions for $(BUILD_PLAT)/$(BOOT_IMAGE) in common include file
marvell_common.mk.

For this purpose it is needed to include plat/marvell/marvell.mk file from
a3700_common.mk unconditionally (and not only when WTP is defined). Now
when common file plat/marvell/marvell.mk does not contain definition for
building $(DOIMAGETOOL), it is possible to move its inclusion at the top of
the a3700_common.mk file.
Signed-off-by: default avatarPali Rohár <pali@kernel.org>
Change-Id: Ic58303b37a1601be9a06ff83b7a279cb7cfc8280
      91bc2da7
    • Pali Rohár's avatar
      plat: marvell: armada: a3k: Add support for building $(DOIMAGETOOL) · c6a7ab77
      Pali Rohár authored 
      Current binary wtptp/linux/tbb_linux which is specified in $(DOIMAGETOOL)
variable points to external pre-compiled Marvell x86_64 ELF linux binary
from A3700-utils-marvell WTP repository.

It means that currently it is not possible to compile TF-A for A3720 on
other host platform then linux x86_64.

Part of the A3700-utils-marvell WTP repository is also source code of
$(DOIMAGETOOL) TBB_Linux tool.

This change adds support for building $(DOIMAGETOOL) also for a3k platform.

After running $(MAKE) at appropriate subdirectory of A3700-utils-marvell
WTP repository, compiled TBB_linux tool will appear in WTP subdirectory
wtptp/src/TBB_Linux/release/. So update also $(DOIMAGETOOL) variable to
point to the correct location where TBB_linux was built.

To build TBB_linux it is required to compile external Crypto++ library
which is available at: https://github.com/weidai11/cryptopp.git



User needs to set CRYPTOPP_PATH option to specify path to that library.

After this change it is now possible to build whole firmware for A3720
platform without requirement to use pre-compiled/proprietary x86_64
executable binaries from Marvell.
Signed-off-by: default avatarPali Rohár <pali@kernel.org>
Change-Id: I6f26bd4356778a2f8f730a223067a2e550e6c8e0
      c6a7ab77
  23. 21 Oct, 2020 1 commit
    • Pali Rohár's avatar
      plat: marvell: armada: Building ${DOIMAGETOOL} is only for a8k · b5e3d540
      Pali Rohár authored 
      

Currently a3k target is misusing ${DOIMAGETOOL} target for building flash
and UART images. It is not used for building image tool.

So move ${DOIMAGETOOL} target from common marvell include file into a8k
include file and add correct invocation of ${MAKE} into a3k for building
flash and UART images.

Part of this change is also checks that MV_DDR_PATH for a3k was specified
by user as this option is required for building a3k flash and UART images.
Signed-off-by: default avatarPali Rohár <pali@kernel.org>
Change-Id: I5ae9d08b8505460933f17836c9b6435fd6e51bb6
      b5e3d540
  25. 19 Oct, 2020 1 commit
    • Pali Rohár's avatar
      plat: marvell: armada: Fix including plat/marvell/marvell.mk file · 0412b732
      Pali Rohár authored 
      

Include file plat/marvell/marvell.mk for platform A3700 was included two
times. Once from file plat/marvell/armada/a3k/common/a3700_common.mk and
second time from common file plat/marvell/armada/common/marvell_common.mk.

It caused following warning every time was make called:

    plat/marvell/marvell.mk:51: warning: overriding recipe for target 'mrvl_clean'
    plat/marvell/marvell.mk:51: warning: ignoring old recipe for target 'mrvl_clean'

Change in this commit removes inclusion of plat/marvell/marvell.mk file in
common file plat/marvell/armada/common/marvell_common.mk. As a80x0 platform
needs this include file, add it also into a80x0 platform specific include
file lat/marvell/armada/a8k/common/a8k_common.mk.

Also moves inclusion of plat/marvell/marvell.mk file in a3700 platform file
plat/marvell/armada/a3k/common/a3700_common.mk at correct place. Global
plat/marvell/marvell.mk expects that variables DOIMAGEPATH and DOIMAGETOOL
are already defined, but it defines MARVELL_SECURE_BOOT variable which is
needed by plat/marvell/armada/a3k/common/a3700_common.mk.
Signed-off-by: default avatarPali Rohár <pali@kernel.org>
Change-Id: I5cbbd7eb8a3376924419f9850516b2a4924be5aa
      0412b732
  27. 15 Oct, 2020 1 commit
    • Pali Rohár's avatar
      plat: marvell: armada: a3k: When WTP is empty do not define variables and... · c5e1b061
      Pali Rohár authored 
      
plat: marvell: armada: a3k: When WTP is empty do not define variables and targets which depends on it

Some of targets (e.g. mrvl_flash) depends on WTP build option. Other
targets (e.g. fip) can be build also without WTP build option as they do
not depend on it.

This change put all A3720 variables and targets which depends on WTP into
conditional if-endif section, so they are not defined when user has not
supplied WTP build option.

Target mrvl_flash is defined also when WTP was not specified and in this
case it just print error message to help user.

Variables which do not depend on WTP are moved to the top of
a3700_common.mk file.
Signed-off-by: default avatarPali Rohár <pali@kernel.org>
Change-Id: Idb3892233586a0afca3e0e6564279641d2e4b960
      c5e1b061
  29. 04 Oct, 2020 2 commits
  31. 10 Jul, 2020 1 commit
  33. 19 Jun, 2020 3 commits
  35. 18 Jun, 2020 1 commit
    • Marcin Wojtas's avatar
      plat: marvell: armada: modify PLAT_FAMILY name for 37xx SoCs · b5c850d4
      Marcin Wojtas authored 
      

The Marvell Armada 37xx SoCs-based platforms contain a bit
awkward directory structure because the currently only one
supported PLAT and PLAT_FAMILY are the same. Modify the latter
to 'a3k' in order to improve it and keep plat/marvell/armada
tree more consistent:

plat/marvell/
├── armada
│   ├── a3k
│   │   ├── a3700

[...]

│   ├── a8k
│   │   ├── a70x0

[...]

Change-Id: I693a6ef88e6ce49a326a3328875c90bbc186066a
Signed-off-by: default avatarMarcin Wojtas <mw@semihalf.com>
      b5c850d4