- 20 Apr, 2021 1 commit
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Konstantin Porotchkin authored
Setting MSS_SUPPORT to 0 also removes requirement for SCP_BL2 definition. Images build with MSS_SUPPORT=0 will not include service CPUs FW and will not support PM, FC and other features implemented in these FW images. Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Change-Id: Idf301ebd218ce65a60f277f3876d0aeb6c72f105 Reviewed-on: https://sj1git1.cavium.com/c/IP/SW/boot/atf/+/37769 Tested-by: sa_ip-sw-jenkins <sa_ip-sw-jenkins@marvell.com> Reviewed-by: Stefan Chulski <stefanc@marvell.com> Reviewed-by: Ofer Heifetz <oferh@marvell.com> Reviewed-by: Nadav Haklai <nadavh@marvell.com>
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- 02 Feb, 2021 5 commits
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Pali Rohár authored
docs: marvell: Replace ESPRESSObin-Ultra TF-A build example by full example how to build production release of Marvell firmware image ESPRESSObin-Ultra TF-A build example was now just a copy+paste of previous mentioned example. It produced debug binary with custom log level, which was not described. So rather replace this duplicate build example by a full example with all steps how to build production release of Marvell firmware image for EspressoBin with 1GHz CPU and 1GB DDR4 RAM. Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: Ief1b8bc96a3035ebd8421bd68dca5eb5c8d8fd52
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Pali Rohár authored
Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I192acab2a7f42cd80069faeac2d7823a05558dc6
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Pali Rohár authored
Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I5310c30051703bbf9f377762a00eb6a8188c6fa1
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Pali Rohár authored
Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I96c2d9d5bc6c69a1a66a29bf586a23375d63ab5a
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Pali Rohár authored
Reformat list of boards, remove unsupported OcteonTX2 and mention supported Turris MOX board. Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I22cea7f77fd078554c7f0ed4108781626209e563
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- 29 Jan, 2021 4 commits
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Pali Rohár authored
Default WTMI_IMG value was documented incorrectly. Also WTMI_IMG name may be misleading as this option does not specify full WTMI image, just a main loop (e.g. fuse.bin or custom RTOS image) without hardware initialization code (DDR, CPU and clocks). Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I3de4a27ce2165b962fa628c992fd8f80151efd7c
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Pali Rohár authored
Information is taken from the post https://lists.denx.de/pipermail/u-boot/2017-July/299351.html Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I5f608e135ec56685a3e2b986a52670540d48a4bf
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Pali Rohár authored
This change separates building of flash and UART images, so it is possible to build only one of these images. Also this change allows make to build them in parallel. Target mrvl_flash now builds only flash image and mrvl_uart only UART image. This change reflects it also in the documentation. Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: Ie9ce4538d52188dd26d99dfeeb5ad171a5b818f3
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Pali Rohár authored
This change introduces two new A3720 parameters, CRYPTOPP_LIBDIR and CRYPTOPP_INCDIR, which can be used to specify directory paths to pre-compiled Crypto++ library and header files. When both new parameters are specified then the source code of Crypto++ via CRYPTOPP_PATH parameter is not needed. And therefore it allows TF-A build process to use system Crypto++ library. Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I6d440f86153373b11b8d098bb68eb7325e86b20b
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- 28 Jan, 2021 1 commit
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Pali Rohár authored
Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: Id5e36b7ba3a840cb3598c580e806b52d8e8dd70f
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- 26 Jan, 2021 1 commit
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Pali Rohár authored
Marvell finally started providing the latest version of mv-ddr-marvell and A3700-utils-marvell code in master branch of their git repositories. Reflect this in build instructions. Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I08d1189dac60eb2a28335c68f611c1da634106f6
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- 21 Jan, 2021 1 commit
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David Horstmann authored
Fix some typos and misspellings in TF-A documentation. Signed-off-by: David Horstmann <david.horstmann@arm.com> Change-Id: Id72553ce7b2f0bed9821604fbc8df4d4949909fa
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- 14 Jan, 2021 1 commit
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Luka Kovacic authored
The supported MARVELL_PLATFORM list is updated to include the recently added a80x0_puzzle platform (IEI Puzzle-M801). Additionally building instructions are added for the GST ESPRESSObin-Ultra board (1 GB, DDR4 RAM variant), which has been tested successfully and booted TF-A on the board. Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr> Change-Id: Ie5724df27c1ee2e8f6a52664520579e872471e93
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- 05 Jan, 2021 1 commit
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Marek Behún authored
Introduce a new build option CM3_SYSTEM_RESET for A3700 platform, which, when enabled, adds code to the PSCI reset handler to try to do system reset by the WTMI firmware running on the Cortex-M3 secure coprocessor. (This function is exposed via the mailbox interface.) The reason is that the Turris MOX board has a HW bug which causes reset to hang unpredictably. This issue can be solved by putting the board in a specific state before reset. Signed-off-by: Marek Behún <marek.behun@nic.cz> Change-Id: I3f60b9f244f334adcd33d6db6a361fbc8b8d209f
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- 19 Nov, 2020 1 commit
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Pali Rohár authored
Also add example how to build TF-A for A3720 Turris MOX board and also fix style/indentation issues and information about default values. Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I2dc957307b1b627b403a8d960e85f5ac9e15aee5
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- 11 Oct, 2020 1 commit
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Pali Rohár authored
Add information about 2GB variant of EspressoBin V5 and use Marvell git branches which contain required fixes for EspressoBin. Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I1db510f1576f4762259ad7b0c10024b8ab434a59
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- 04 Oct, 2020 1 commit
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Marcin Wojtas authored
Now that the BLE image sources (mv_ddr) are updated, reflect the proper branch in the Armada build howto. Change-Id: I959d1343d0dfdd681c7e39bdcaed9b36aaddfca1 Signed-off-by: Marcin Wojtas <mw@semihalf.com>
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- 30 Jul, 2020 3 commits
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Grzegorz Jaszczyk authored
The purpose of rx_training had changed after last update. Currently it is not supposed to help with providing static parameters for porting layer. Instead, it aims to suit the parameters per connection. Change-Id: I2a146b71e2e20bd264c090a9a627d0b6bc56e052 Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
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Grzegorz Jaszczyk authored
Change-Id: I0cebbaa900aa518700f13cbf02f8a97e0c76b21c Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
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Konstantin Porotchkin authored
Add references to the OcteonTX2 CN913x family. Change-Id: I172a8e3d061086bf4843acad014c113c80359e01 Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
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- 10 Jul, 2020 1 commit
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Konstantin Porotchkin authored
The LLC SRAM will be enabled in OP-TEE OS for usage as secure storage. The CCU have to prepare SRAM window, but point to the DRAM-0 target until the SRAM is actually enabled. This patch changes CCU SRAM window target to DRAM-0 Remove dependence between LLC_SRAM and LLC_ENABLE and update the build documentation. The SRAМ base moved to follow the OP-TEE SHMEM area (0x05400000) Change-Id: I85c2434a3d515ec37da5ae8eb729e3280f91c456 Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
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- 19 Jun, 2020 1 commit
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Konstantin Porotchkin authored
Add llc_sram_enable() and llc_sram_disable() APIs to Marvell cache_lls driver. Add LLC_SRAM definition to Marvell common makefile - disabled by the default. Add description of LLC_SRAM flag to the build documentation. Change-Id: Ib348e09752ce1206d29268ef96c9018b781db182 Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
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- 06 Jun, 2020 2 commits
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Alex Leibovich authored
This commit introduces 32-bit DDR topology map initialization. For that purpose a new DDR32 build flag is added, with according documentation update. Change-Id: I169ff358c2923afd984e27bc126dc551dcaefc01 Signed-off-by: Alex Leibovich <alexl@marvell.com>
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Grzegorz Jaszczyk authored
This commit is a preparation for upcoming support for OcteonTX and OcteonTX2 product families. Armada platform related files (docs, plat, include/plat) are moved to the new "armada" sub-folder. Change-Id: Icf03356187078ad6a2e56c9870992be3ca4c9655 Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
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- 08 Jan, 2020 1 commit
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Mark Dykes authored
This reverts commit de9bf1d8. Change-Id: Iebb6297ce290a10ee850bf6a9c71e7eb530b085f
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- 03 Jan, 2020 1 commit
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Madhukar Pappireddy authored
This toolchain provides multiple cross compilers and are publicly available on www.developer.arm.com We thoroughly test TF-A in CI using: AArch32 bare-metal target (arm-none-eabi) AArch64 ELF bare-metal target (aarch64-none-elf) Change-Id: I2360a3ac6705c68dca781b85e9894867df255b3e Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
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- 27 Nov, 2019 1 commit
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Paul Beesley authored
The User Guide document has grown organically over time and now covers a wide range of topics, making it difficult to skim read and extract information from. Currently, it covers these topics and maybe a couple more: - Requirements (hardware, tools, libs) - Checking out the repo - Basic build instructions - A comprehensive list of build flags - FIP packaging - Building specifically for Juno - Firmware update images - EL3 payloads - Preloaded BL33 boot flow - Running on FVPs - Running on Juno I have separated these out into a few groups that become new documents. Broadly speaking, build instructions for the tools, for TF-A generally, and for specific scenarios are separated. Content relating to specific platforms (Juno and the FVPs are Arm-specific platforms, essentially) has been moved into the documentation that is specific to those platforms, under docs/plat/arm. Change-Id: Ica87c52d8cd4f577332be0b0738998ea3ba3bbec Signed-off-by: Paul Beesley <paul.beesley@arm.com>
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- 11 Oct, 2019 1 commit
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Paul Beesley authored
Tidying up a few Sphinx warnings that had built-up over time. None of these are critical but it cleans up the Sphinx output. At the same time, fixing some spelling errors that were detected. Change-Id: I38209e235481eed287f8008c6de9dedd6b12ab2e Signed-off-by: Paul Beesley <paul.beesley@arm.com>
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- 20 Sep, 2019 1 commit
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Paul Beesley authored
The documentation for Marvell platforms was not included in the rendered document output until now because, while it was mostly valid RST format, the files were saved with a .txt extension. This patch corrects some RST formatting errors, creates a document tree (index page) for the Marvell documents, and adds the Marvell subtree to the main index. Change-Id: Id7d4ac37eded636f8f62322a153e1e5f652ff51a Signed-off-by: Paul Beesley <paul.beesley@arm.com>
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- 21 May, 2019 1 commit
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Paul Beesley authored
This change creates the following directories under docs/ in order to provide a grouping for the content: - components - design - getting_started - perf - process In each of these directories an index.rst file is created and this serves as an index / landing page for each of the groups when the pages are compiled. Proper layout of the top-level table of contents relies on this directory/index structure. Without this patch it is possible to build the documents correctly with Sphinx but the output looks messy because there is no overall hierarchy. Change-Id: I3c9f4443ec98571a56a6edf775f2c8d74d7f429f Signed-off-by: Paul Beesley <paul.beesley@arm.com>
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