1. 26 Sep, 2019 1 commit
    • Madhukar Pappireddy's avatar
      GICv3: Enable multi socket GIC redistributor frame discovery · ec834925
      Madhukar Pappireddy authored
      
      
      This patch provides declaration and definition of new GICv3 driver
      API: gicv3_rdistif_probe().This function delegates the responsibility
      of discovering the corresponding Redistributor base frame to each CPU
      itself. It is a modified version of gicv3_rdistif_base_addrs_probe()
      and is executed by each CPU in the platform unlike the previous
      approach in which only the Primary CPU did the discovery of all the
      Redistributor frames for every CPU.
      
      The flush operations as part of gicv3_driver_init() function are
      made necessary even for platforms with WARMBOOT_ENABLE_DCACHE_EARLY
      because the GICv3 driver data structure contents are accessed by CPU
      with D-Cache turned off during power down operations.
      
      Change-Id: I1833e81d3974b32a3e4a3df4766a33d070982268
      Signed-off-by: default avatarMadhukar Pappireddy <madhukar.pappireddy@arm.com>
      ec834925
  2. 13 Sep, 2019 1 commit
  3. 01 Aug, 2019 2 commits
    • Julius Werner's avatar
      Switch AARCH32/AARCH64 to __aarch64__ · 402b3cf8
      Julius Werner authored
      
      
      NOTE: AARCH32/AARCH64 macros are now deprecated in favor of __aarch64__.
      
      All common C compilers pre-define the same macros to signal which
      architecture the code is being compiled for: __arm__ for AArch32 (or
      earlier versions) and __aarch64__ for AArch64. There's no need for TF-A
      to define its own custom macros for this. In order to unify code with
      the export headers (which use __aarch64__ to avoid another dependency),
      let's deprecate the AARCH32 and AARCH64 macros and switch the code base
      over to the pre-defined standard macro. (Since it is somewhat
      unintuitive that __arm__ only means AArch32, let's standardize on only
      using __aarch64__.)
      
      Change-Id: Ic77de4b052297d77f38fc95f95f65a8ee70cf200
      Signed-off-by: default avatarJulius Werner <jwerner@chromium.org>
      402b3cf8
    • Julius Werner's avatar
      Replace __ASSEMBLY__ with compiler-builtin __ASSEMBLER__ · d5dfdeb6
      Julius Werner authored
      
      
      NOTE: __ASSEMBLY__ macro is now deprecated in favor of __ASSEMBLER__.
      
      All common C compilers predefine a macro called __ASSEMBLER__ when
      preprocessing a .S file. There is no reason for TF-A to define it's own
      __ASSEMBLY__ macro for this purpose instead. To unify code with the
      export headers (which use __ASSEMBLER__ to avoid one extra dependency),
      let's deprecate __ASSEMBLY__ and switch the code base over to the
      predefined standard.
      
      Change-Id: Id7d0ec8cf330195da80499c68562b65cb5ab7417
      Signed-off-by: default avatarJulius Werner <jwerner@chromium.org>
      d5dfdeb6
  4. 28 Jun, 2019 1 commit
  5. 26 Jun, 2019 1 commit
  6. 05 Jun, 2019 1 commit
    • James kung's avatar
      Prevent pending G1S interrupt become G0 interrupt · acc29852
      James kung authored
      
      
      According to Arm GIC spec(IHI0069E, section 4.6.1),
      when GICD_CTLR.DS == 0, Secure Group 1 interrupts
      are treated as Group 0 by a CPU interface if:
      - The PE does not implement EL3.
      - ICC_SRE_EL1(S).SRE == 0
      
      When a cpu enter suspend or deep idle, it might be
      powered off. When the cpu resume, according to
      the GIC spec(IHI0069E, section 9.2.15, 9.2.16 and
      9.2.22) the ICC_SRE_EL1.SRE reset value is 0 (if
      write is allowed) and G0/G1S/G1NS interrupt of the
      GIC cpu interface are all disabled.
      
      If a G1S SPI interrupt occurred and the target cpu
      of the SPI is assigned to a specific cpu which is
      in suspend and is powered off, when the cpu resume
      and start to initial the GIC cpu interface, the
      initial sequence might affect the interrupt group
      type of the pending interrupt on the cpu interface.
      
      Current initial sequence on the cpu interface is:
      1. Enable G0 interrupt
      2. Enable G1S interrupt
      3. Enable ICC_SRE_EL1(S).SRE
      
      It is possible to treat the pending G1S interrupt
      as G0 interrupt on the cpu interface if the G1S
      SPI interrupt occurred between step2 and step3.
      
      To prevent the above situation happend, the initial
      sequence should be changed as follows:
      1. Enable ICC_SRE_EL1(S).SRE
      2. Enable G0 interrupt
      3. Enable G1S interrupt
      
      Change-Id: Ie34f6e0b32eb9a1677ff72571fd4bfdb5cae25b0
      Signed-off-by: default avatarJames Kung <kong1191@gmail.com>
      acc29852
  7. 23 May, 2019 1 commit
  8. 10 May, 2019 1 commit
    • Alexei Fedorov's avatar
      SMMUv3: Abort DMA transactions · 1461ad9f
      Alexei Fedorov authored
      
      
      For security DMA should be blocked at the SMMU by default
      unless explicitly enabled for a device. SMMU is disabled
      after reset with all streams bypassing the SMMU, and
      abortion of all incoming transactions implements a default
      deny policy on reset.
      This patch also moves "bl1_platform_setup()" function from
      arm_bl1_setup.c to FVP platforms' fvp_bl1_setup.c and
      fvp_ve_bl1_setup.c files.
      
      Change-Id: Ie0ffedc10219b1b884eb8af625bd4b6753749b1a
      Signed-off-by: default avatarAlexei Fedorov <Alexei.Fedorov@arm.com>
      1461ad9f
  9. 03 May, 2019 1 commit
    • Alexei Fedorov's avatar
      SMMUv3: refactor the driver code · ccd4d475
      Alexei Fedorov authored
      
      
      This patch is a preparation for the subsequent changes in
      SMMUv3 driver. It introduces a new "smmuv3_poll" function
      and replaces inline functions for accessing SMMU registers
      with mmio read/write operations. Also the infinite loop
      for the poll has been replaced with a counter based timeout.
      
      Change-Id: I7a0547beb1509601f253e126b1a7a6ab3b0307e7
      Signed-off-by: default avatarAlexei Fedorov <Alexei.Fedorov@arm.com>
      ccd4d475
  10. 17 Apr, 2019 1 commit
  11. 03 Apr, 2019 2 commits
  12. 01 Apr, 2019 1 commit
  13. 13 Mar, 2019 1 commit
  14. 28 Feb, 2019 1 commit
  15. 19 Feb, 2019 1 commit
  16. 04 Feb, 2019 1 commit
    • Soby Mathew's avatar
      GICv3: Allow probe for fewer GICR interfaces than exposed by the frame · 5dc2c3f9
      Soby Mathew authored
      
      
      Previously the GICv3 redistributor probe function
      (gicv3_rdistif_base_addrs_probe()) asserted that the number of
      per-CPU redistributor interfaces expected to be probed by the
      platform is equal to the number exported by the redistributor
      frame. This is a problem in case the number of CPUs in the
      platform is less than the number of redistributor interfaces
      in the frame. Hence this patch removes the assertion check
      and allows probe for fewer redistributor interfaces as required
      by the platform.
      
      Change-Id: I3449763a3ad70817224442cbe184d001030c9874
      Signed-off-by: default avatarSoby Mathew <soby.mathew@arm.com>
      5dc2c3f9
  17. 25 Jan, 2019 6 commits
  18. 15 Jan, 2019 1 commit
    • Paul Beesley's avatar
      Correct typographical errors · 8aabea33
      Paul Beesley authored
      
      
      Corrects typos in core code, documentation files, drivers, Arm
      platforms and services.
      
      None of the corrections affect code; changes are limited to comments
      and other documentation.
      
      Change-Id: I5c1027b06ef149864f315ccc0ea473e2a16bfd1d
      Signed-off-by: default avatarPaul Beesley <paul.beesley@arm.com>
      8aabea33
  19. 04 Jan, 2019 1 commit
    • Antonio Nino Diaz's avatar
      Sanitise includes across codebase · 09d40e0e
      Antonio Nino Diaz authored
      Enforce full include path for includes. Deprecate old paths.
      
      The following folders inside include/lib have been left unchanged:
      
      - include/lib/cpus/${ARCH}
      - include/lib/el3_runtime/${ARCH}
      
      The reason for this change is that having a global namespace for
      includes isn't a good idea. It defeats one of the advantages of having
      folders and it introduces problems that are sometimes subtle (because
      you may not know the header you are actually including if there are two
      of them).
      
      For example, this patch had to be created because two headers were
      called the same way: e0ea0928 ("Fix gpio includes of mt8173 platform
      to avoid collision."). More recently, this patch has had similar
      problems: 46f9b2c3 ("drivers: add tzc380 support").
      
      This problem was introduced in commit 4ecca339
      
       ("Move include and
      source files to logical locations"). At that time, there weren't too
      many headers so it wasn't a real issue. However, time has shown that
      this creates problems.
      
      Platforms that want to preserve the way they include headers may add the
      removed paths to PLAT_INCLUDES, but this is discouraged.
      
      Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      09d40e0e
  20. 12 Dec, 2018 1 commit
  21. 07 Dec, 2018 1 commit
    • Julius Werner's avatar
      drivers/console: Link console framework code by default · 985ee0b7
      Julius Werner authored
      
      
      This patch makes the build system link the console framework code by
      default, like it already does with other common libraries (e.g. cache
      helpers). This should not make a difference in practice since TF is
      linked with --gc-sections, so the linker will garbage collect all
      functions and data that are not referenced by any other code. Thus, if a
      platform doesn't want to include console code for size reasons and
      doesn't make any references to console functions, the code will not be
      included in the final binary.
      
      To avoid compatibility issues with older platform ports, only make this
      change for the MULTI_CONSOLE_API.
      
      Change-Id: I153a9dbe680d57aadb860d1c829759ba701130d3
      Signed-off-by: default avatarJulius Werner <jwerner@chromium.org>
      985ee0b7
  22. 05 Dec, 2018 1 commit
  23. 04 Dec, 2018 1 commit
  24. 23 Nov, 2018 1 commit
  25. 21 Nov, 2018 1 commit
  26. 08 Nov, 2018 1 commit
    • Antonio Nino Diaz's avatar
      Standardise header guards across codebase · c3cf06f1
      Antonio Nino Diaz authored
      
      
      All identifiers, regardless of use, that start with two underscores are
      reserved. This means they can't be used in header guards.
      
      The style that this project is now to use the full name of the file in
      capital letters followed by 'H'. For example, for a file called
      "uart_example.h", the header guard is UART_EXAMPLE_H.
      
      The exceptions are files that are imported from other projects:
      
      - CryptoCell driver
      - dt-bindings folders
      - zlib headers
      
      Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      c3cf06f1
  27. 06 Nov, 2018 1 commit
  28. 23 Oct, 2018 1 commit
    • Antonio Nino Diaz's avatar
      tzc: Fix MISRA defects · af6491f8
      Antonio Nino Diaz authored
      
      
      The definitions FAIL_CONTROL_*_SHIFT were incorrect, they have been
      fixed.
      
      The types tzc_region_attributes_t and tzc_action_t have been removed and
      replaced by unsigned int because it is not allowed to do logical
      operations on enums.
      
      Also, fix some address definitions in arm_def.h.
      
      Change-Id: Id37941d76883f9fe5045a5f0a4224c133c504d8b
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      af6491f8
  29. 19 Oct, 2018 1 commit
    • Soby Mathew's avatar
      Multi-console: Deprecate the `finish_console_register` macro · cc5859ca
      Soby Mathew authored
      
      
      The `finish_console_register` macro is used by the multi console
      framework to register the `console_t` driver callbacks. It relied
      on weak references to the `ldr` instruction to populate 0 to the
      callback in case the driver has not defined the appropriate
      function. Use of `ldr` instruction to load absolute address to a
      reference makes the binary position dependant. These instructions
      should be replaced with adrp/adr instruction for position independant
      executable(PIE). But adrp/adr instructions don't work well with weak
      references as described in GNU ld bugzilla issue 22589.
      
      This patch defines a new version of `finish_console_register` macro
      which can spcify which driver callbacks are valid and deprecates the
      old one. If any of the argument is not specified, then the macro
      populates 0 for that callback. Hence the functionality of the previous
      deprecated macro is preserved. The USE_FINISH_CONSOLE_REG_2 define
      is used to select the new variant of the macro and will be removed
      once the deprecated variant is removed.
      
      All the upstream console drivers have been migrated to use the new
      macro in this patch.
      
      NOTE: Platforms be aware that the new variant of the
      `finish_console_register` should be used and the old variant is
      deprecated.
      
      Change-Id: Ia6a67aaf2aa3ba93932992d683587bbd0ad25259
      Signed-off-by: default avatarSoby Mathew <soby.mathew@arm.com>
      cc5859ca
  30. 12 Oct, 2018 1 commit
  31. 03 Oct, 2018 1 commit
  32. 28 Sep, 2018 2 commits