- 03 Sep, 2020 1 commit
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Sandeep Tripathy authored
The API can be used to invoke a 'stop_func' callback for all other cores from any initiating core. Optionally it can also wait for other cores to power down. There may be various use of such API by platform. Ex: Platform may use this to power down all other cores from a crashed core. Signed-off-by: Sandeep Tripathy <sandeep.tripathy@broadcom.com> Change-Id: I4f9dc8a38d419f299c021535d5f1bcc6883106f9
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- 10 Jan, 2020 1 commit
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Deepika Bhavnani authored
NOTE for platform integrators: API `plat_psci_stat_get_residency()` third argument `last_cpu_idx` is changed from "signed int" to the "unsigned int" type. Issue / Trouble points 1. cpu_idx is used as mix of `unsigned int` and `signed int` in code with typecasting at some places leading to coverity issues. 2. Underlying platform API's return cpu_idx as `unsigned int` and comparison is performed with platform specific defines `PLAFORM_xxx` which is not consistent Misra Rule 10.4: The value of a complex expression of integer type may only be cast to a type that is narrower and of the same signedness as the underlying type of the expression. Based on above points, cpu_idx is kept as `unsigned int` to match the API's and low-level functions and platform defines are updated where ever required Signed-off-by: Deepika Bhavnani <deepika.bhavnani@arm.com> Change-Id: Ib26fd16e420c35527204b126b9b91e8babcc3a5c
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- 26 Sep, 2019 1 commit
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Madhukar Pappireddy authored
This PSCI hook is similar to pwr_domain_on_finish but is guaranteed to be invoked with the respective core and cluster are participating in coherency. This will be necessary to safely invoke the new GICv3 API which modifies shared GIC data structures concurrently. Change-Id: I8e54f05c9d4ef5712184c9c18ba45ac97a29eb7a Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
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- 01 Aug, 2019 1 commit
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Julius Werner authored
NOTE: __ASSEMBLY__ macro is now deprecated in favor of __ASSEMBLER__. All common C compilers predefine a macro called __ASSEMBLER__ when preprocessing a .S file. There is no reason for TF-A to define it's own __ASSEMBLY__ macro for this purpose instead. To unify code with the export headers (which use __ASSEMBLER__ to avoid one extra dependency), let's deprecate __ASSEMBLY__ and switch the code base over to the predefined standard. Change-Id: Id7d0ec8cf330195da80499c68562b65cb5ab7417 Signed-off-by: Julius Werner <jwerner@chromium.org>
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- 04 Jan, 2019 1 commit
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Antonio Nino Diaz authored
Enforce full include path for includes. Deprecate old paths. The following folders inside include/lib have been left unchanged: - include/lib/cpus/${ARCH} - include/lib/el3_runtime/${ARCH} The reason for this change is that having a global namespace for includes isn't a good idea. It defeats one of the advantages of having folders and it introduces problems that are sometimes subtle (because you may not know the header you are actually including if there are two of them). For example, this patch had to be created because two headers were called the same way: e0ea0928 ("Fix gpio includes of mt8173 platform to avoid collision."). More recently, this patch has had similar problems: 46f9b2c3 ("drivers: add tzc380 support"). This problem was introduced in commit 4ecca339 ("Move include and source files to logical locations"). At that time, there weren't too many headers so it wasn't a real issue. However, time has shown that this creates problems. Platforms that want to preserve the way they include headers may add the removed paths to PLAT_INCLUDES, but this is discouraged. Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 09 Nov, 2018 1 commit
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Yann Gautier authored
These warnings were issued by sparse: plat/st/stm32mp1/stm32mp1_pm.c:365:36: warning: incorrect type in initializer (different modifiers) expected void ( *[noreturn] pwr_domain_pwr_down_wfi )( ... ) got void ( [noreturn] *<noident> )( ... ) plat/st/stm32mp1/stm32mp1_pm.c:366:23: warning: incorrect type in initializer (different modifiers) expected void ( *[noreturn] system_off )( ... ) got void ( [noreturn] *<noident> )( ... ) plat/st/stm32mp1/stm32mp1_pm.c:367:25: warning: incorrect type in initializer (different modifiers) expected void ( *[noreturn] system_reset )( ... ) got void ( [noreturn] *<noident> )( ... ) This cannot be changed the other way in all platforms pm drivers or else there is a compilation error: plat/st/stm32mp1/stm32mp1_pm.c:234:1: error: attributes should be specified before the declarator in a function definition Signed-off-by: Yann Gautier <yann.gautier@st.com>
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- 28 Sep, 2018 2 commits
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Antonio Nino Diaz authored
Change-Id: I9fd8016527ad7706494f34356fdae8efacef5f72 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Roberto Vargas authored
Change-Id: I40d040aa05bcbf11536a96ce59827711456b93a8 Co-authored-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 22 Aug, 2018 1 commit
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Antonio Nino Diaz authored
The codebase was using non-standard headers. It is needed to replace them by the correct ones so that we can use the new libc headers. Change-Id: I530f71d9510cb036e69fe79823c8230afe890b9d Acked-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 24 Jul, 2018 1 commit
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Antonio Nino Diaz authored
MISRA C-2012 Rules 10.1, 10.3, 17.8 and 20.7. Change-Id: I3980bd2a1d845559af4bbe2887a0250d0506a064 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 20 Jul, 2018 3 commits
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Antonio Nino Diaz authored
Also change header guards to fix defects of MISRA C-2012 Rule 21.1. Change-Id: Ied0d4b0e557ef6119ab669d106d2ac5d99620c57 Acked-by: Sumit Garg <sumit.garg@linaro.org> Acked-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Fix MISRA C-2012 Rules 8.2 and 21.1. Change-Id: I7f41fe76fe16399734d11847ab601ad8eb78df1a Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Fix MISRA C-2012 Directive 4.9 and Rule 21.1 defects. Change-Id: I96c216317d38741ee632d2640cd7b36e6723d5c2 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 13 Oct, 2017 2 commits
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Roberto Vargas authored
Updated the PSCI version conforming to the PSCI v1.1 specification (ARM DEN022D). Change-Id: I1f34772ef6de37ec1ade719a1ab3aa062152d995 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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Roberto Vargas authored
This patch implements PSCI_SYSTEM_RESET2 API as defined in PSCI v1.1 specification. The specification allows architectural and vendor-specific resets via this API. In the current specification, there is only one architectural reset, the warm reset. This reset is intended to provide a fast reboot path that guarantees not to reset system main memory. Change-Id: I057bb81a60cd0fe56465dbb5791d8e1cca025bd3 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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- 25 Sep, 2017 1 commit
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Roberto Vargas authored
This patch adds the generic code that links the psci smc handler with the platform function that implements the mem_protect and mem_check_range functionalities. These functions are optional APIs added in PSCI v1.1 (ARM DEN022D). Change-Id: I3bac1307a5ce2c7a196ace76db8317e8d8c8bb3f Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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- 31 Jul, 2017 1 commit
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Varun Wadekar authored
This patch adds an early suspend handler, that executes with SMP and data cache enabled. This handler allows platforms to perform any early actions during the CPU suspend entry sequence. This handler is optional and platforms can choose to implement it depending on their needs. The `pwr_domain_suspend` handler still exists and platforms can keep on using it without any side effects. Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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- 15 Jun, 2017 1 commit
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Varun Wadekar authored
This patch uses the U() and ULL() macros for constants, to fix some of the signed-ness defects flagged by the MISRA scanner. Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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- 04 May, 2017 1 commit
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Jeenu Viswambharan authored
In AArch64, privileged exception levels control the execution state (a.k.a. register width) of the immediate lower Exception Level; i.e. whether the lower exception level executes in AArch64 or AArch32 state. For an exception level to have its execution state changed at run time, it must request the change by raising a synchronous exception to the higher exception level. This patch implements and adds such a provision to the ARM SiP service, by which an immediate lower exception level can request to switch its execution state. The execution state is switched if the request is: - raised from non-secure world; - raised on the primary CPU, before any secondaries are brought online with CPU_ON PSCI call; - raised from an exception level immediately below EL3: EL2, if implemented; otherwise NS EL1. If successful, the SMC doesn't return to the caller, but to the entry point supplied with the call. Otherwise, the caller will observe the SMC returning with STATE_SW_E_DENIED code. If ARM Trusted Firmware is built for AArch32, the feature is not supported, and the call will always fail. For the ARM SiP service: - Add SMC function IDs for both AArch32 and AArch64; - Increment the SiP service minor version to 2; - Adjust the number of supported SiP service calls. Add documentation for ARM SiP service. Fixes ARM-software/tf-issues#436 Change-Id: I4347f2d6232e69fbfbe333b340fcd0caed0a4cea Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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- 03 May, 2017 1 commit
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dp-arm authored
To make software license auditing simpler, use SPDX[0] license identifiers instead of duplicating the license text in every file. NOTE: Files that have been imported by FreeBSD have not been modified. [0]: https://spdx.org/ Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761a Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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- 27 Mar, 2017 1 commit
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Soby Mathew authored
This patch re-factors the following headers to make it easier to integrate the PSCI library with an AArch32 Secure Payload : * bl_common.h : The entry point information and the param header data structures are factored out into separate headers ep_info.h and param_headers.h * psci.h : The PSCI library interfaces are factored out into the new header psci_lib.h * context_mgmt.h : The header file is modified to not include arch.h when compiled for AArch32 mode. No functional changes are introduced by this patch. Change-Id: I5e21a843c0af2ba8e47dee4e577cf95929be8cd4 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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- 22 Sep, 2016 1 commit
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Soby Mathew authored
This patch introduces a `psci_lib_args_t` structure which must be passed into `psci_setup()` which is then used to initialize the PSCI library. The `psci_lib_args_t` is a versioned structure so as to enable compatibility checks during library initialization. Both BL31 and SP_MIN are modified to use the new structure. SP_MIN is also modified to add version string and build message as part of its cold boot log just like the other BLs in Trusted Firmware. NOTE: Please be aware that this patch modifies the prototype of `psci_setup()`, which breaks compatibility with EL3 Runtime Firmware (excluding BL31 and SP_MIN) integrated with the PSCI Library. Change-Id: Ic3761db0b790760a7ad664d8a437c72ea5edbcd6
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- 15 Sep, 2016 1 commit
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Jeenu Viswambharan authored
This patch adds support for NODE_HW_STATE PSCI API by introducing a new PSCI platform hook (get_node_hw_state). The implementation validates supplied arguments, and then invokes this platform-defined hook and returns its result to the caller. PSCI capabilities are updated accordingly. Also updates porting and firmware design guides. Change-Id: I808e55bdf0c157002a7c104b875779fe50a68a30
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- 10 Aug, 2016 1 commit
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Soby Mathew authored
This patch adds AArch32 support to PSCI library, as follows : * The `psci_helpers.S` is implemented for AArch32. * AArch32 version of internal helper function `psci_get_ns_ep_info()` is defined. * The PSCI Library is responsible for the Non Secure context initialization. Hence a library interface `psci_prepare_next_non_secure_ctx()` is introduced to enable EL3 runtime firmware to initialize the non secure context without invoking context management library APIs. Change-Id: I25595b0cc2dbfdf39dbf7c589b875cba33317b9d
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- 19 Jul, 2016 1 commit
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Soby Mathew authored
This patch introduces the PSCI Library interface. The major changes introduced are as follows: * Earlier BL31 was responsible for Architectural initialization during cold boot via bl31_arch_setup() whereas PSCI was responsible for the same during warm boot. This functionality is now consolidated by the PSCI library and it does Architectural initialization via psci_arch_setup() during both cold and warm boots. * Earlier the warm boot entry point was always `psci_entrypoint()`. This was not flexible enough as a library interface. Now PSCI expects the runtime firmware to provide the entry point via `psci_setup()`. A new function `bl31_warm_entrypoint` is introduced in BL31 and the previous `psci_entrypoint()` is deprecated. * The `smc_helpers.h` is reorganized to separate the SMC Calling Convention defines from the Trusted Firmware SMC helpers. The former is now in a new header file `smcc.h` and the SMC helpers are moved to Architecture specific header. * The CPU context is used by PSCI for context initialization and restoration after power down (PSCI Context). It is also used by BL31 for SMC handling and context management during Normal-Secure world switch (SMC Context). The `psci_smc_handler()` interface is redefined to not use SMC helper macros thus enabling to decouple the PSCI context from EL3 runtime firmware SMC context. This enables PSCI to be integrated with other runtime firmware using a different SMC context. NOTE: With this patch the architectural setup done in `bl31_arch_setup()` is done as part of `psci_setup()` and hence `bl31_platform_setup()` will be invoked prior to architectural setup. It is highly unlikely that the platform setup will depend on architectural setup and cause any failure. Please be be aware of this change in sequence. Change-Id: I7f497a08d33be234bbb822c28146250cb20dab73
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- 18 Jul, 2016 1 commit
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Soby Mathew authored
This patch moves the PSCI services and BL31 frameworks like context management and per-cpu data into new library components `PSCI` and `el3_runtime` respectively. This enables PSCI to be built independently from BL31. A new `psci_lib.mk` makefile is introduced which adds the relevant PSCI library sources and gets included by `bl31.mk`. Other changes which are done as part of this patch are: * The runtime services framework is now moved to the `common/` folder to enable reuse. * The `asm_macros.S` and `assert_macros.S` helpers are moved to architecture specific folder. * The `plat_psci_common.c` is moved from the `plat/common/aarch64/` folder to `plat/common` folder. The original file location now has a stub which just includes the file from new location to maintain platform compatibility. Most of the changes wouldn't affect platform builds as they just involve changes to the generic bl1.mk and bl31.mk makefiles. NOTE: THE `plat_psci_common.c` FILE HAS MOVED LOCATION AND THE STUB FILE AT THE ORIGINAL LOCATION IS NOW DEPRECATED. PLATFORMS SHOULD MODIFY THEIR MAKEFILES TO INCLUDE THE FILE FROM THE NEW LOCATION. Change-Id: I6bd87d5b59424995c6a65ef8076d4fda91ad5e86
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