- 30 Aug, 2018 2 commits
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Antonio Nino Diaz authored
Change-Id: I945029ca26ea2e63f0d92c5f33019b882f23bd72 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Change-Id: Ib587f12f36810fc7d4f4b8f575195554299b8ed4 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 22 Aug, 2018 1 commit
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Antonio Nino Diaz authored
The codebase was using non-standard headers. It is needed to replace them by the correct ones so that we can use the new libc headers. Change-Id: I530f71d9510cb036e69fe79823c8230afe890b9d Acked-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 01 Mar, 2018 1 commit
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Dan Handley authored
Emit runtime warnings when intializing the GIC drivers using the deprecated method of defining integer interrupt arrays in the GIC driver data structures; interrupt_prop_t arrays should be used instead. This helps platforms detect that they have migration work to do. Previously, no warning was emitted in this case. This affects both the GICv2 and GICv3 drivers. Also use the __deprecated attribute to emit a build time warning if these deprecated fields are used. These warnings are suppressed in the GIC driver compatibility functions but will be visible if platforms use them. Change-Id: I6b6b8f6c3b4920c448b6dcb82fc18442cfdf6c7a Signed-off-by: Dan Handley <dan.handley@arm.com>
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- 28 Feb, 2018 1 commit
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Roberto Vargas authored
Rule 8.3: All declarations of an object or function shall use the same names and type qualifiers. Fixed for: make DEBUG=1 PLAT=fvp LOG_LEVEL=50 all Change-Id: I48201c9ef022f6bd42ea8644529afce70f9b3f22 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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- 13 Nov, 2017 1 commit
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Jeenu Viswambharan authored
Acknowledging interrupt shall return a raw value from the interrupt controller in which the actual interrupt ID may be encoded. Add a platform API to extract the actual interrupt ID from the raw value obtained from interrupt controller. Document the new function. Also clarify the semantics of interrupt acknowledge. Change-Id: I818dad7be47661658b16f9807877d259eb127405 Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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- 16 Oct, 2017 10 commits
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Jeenu Viswambharan authored
The GIC driver initialization currently allows an array of interrupts to be configured as secure. Future use cases would require more interrupt configuration other than just security, such as priority. This patch introduces a new interrupt property array as part of both GICv2 and GICv3 driver data. The platform can populate the array with interrupt numbers and respective properties. The corresponding driver initialization iterates through the array, and applies interrupt configuration as required. This capability, and the current way of supplying array (or arrays, in case of GICv3) of secure interrupts, are however mutually exclusive. Henceforth, the platform should supply either: - A list of interrupts to be mapped as secure (the current way). Platforms that do this will continue working as they were. With this patch, this scheme is deprecated. - A list of interrupt properties (properties include interrupt group). Individual interrupt properties are specified via. descriptors of type 'interrupt_prop_desc_t', which can be populated with the macro INTR_PROP_DESC(). A run time assert checks that the platform doesn't specify both. Henceforth the old scheme of providing list of secure interrupts is deprecated. When built with ERROR_DEPRECATED=1, GIC drivers will require that the interrupt properties are supplied instead of an array of secure interrupts. Add a section to firmware design about configuring secure interrupts. Fixes ARM-software/tf-issues#262 Change-Id: I8eec29e72eb69dbb6bce77879febf32c95376942 Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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Jeenu Viswambharan authored
API documentation updated. Change-Id: I40feec1fe67a960d035061b54dd55610bc34ce1d Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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Jeenu Viswambharan authored
API documentation updated. Change-Id: I14e33cfc7dfa93257c82d76fae186b17a1b6d266 Co-authored-by: Yousuf A <yousuf.sait@arm.com> Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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Jeenu Viswambharan authored
SPIs can be routed to either a specific PE, or to any one of all available PEs. API documentation updated. Change-Id: I28675f634568aaf4ea1aa8aa7ebf25b419a963ed Co-authored-by: Yousuf A <yousuf.sait@arm.com> Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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Jeenu Viswambharan authored
API documentation updated. Change-Id: I129725059299af6cc612bafa8d74817f779d7c4f Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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Jeenu Viswambharan authored
The back end GIC driver converts and assigns the interrupt type to suitable group. For GICv2, a build option GICV2_G0_FOR_EL3 is introduced, which determines to which type Group 0 interrupts maps to. - When the build option is set 0 (the default), Group 0 interrupts are meant for Secure EL1. This is presently the case. - Otherwise, Group 0 interrupts are meant for EL3. This means the SPD will have to synchronously hand over the interrupt to Secure EL1. The query API allows the platform to query whether the platform supports interrupts of a given type. API documentation updated. Change-Id: I60fdb4053ffe0bd006b3b20914914ebd311fc858 Co-authored-by: Yousuf A <yousuf.sait@arm.com> Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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Jeenu Viswambharan authored
API documentation updated. Change-Id: Ib700eb1b8ca65503aeed0ac4ce0e7b934df67ff9 Co-authored-by: Yousuf A <yousuf.sait@arm.com> Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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Jeenu Viswambharan authored
API documentation updated. Change-Id: Ice7511f8df5356851001d2f7dc2a46cfe318f9ba Co-authored-by: Yousuf A <yousuf.sait@arm.com> Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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Jeenu Viswambharan authored
API documentation updated. Change-Id: I6d61785af0d5330930c709de971a904dc7c3516c Co-authored-by: Yousuf A <yousuf.sait@arm.com> Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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Jeenu Viswambharan authored
Document the API in separate platform interrupt controller API document. Change-Id: If18f208e10a8a243f5c59d226fcf48e985941949 Co-authored-by: Yousuf A <yousuf.sait@arm.com> Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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- 05 Oct, 2017 2 commits
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Soby Mathew authored
This patch adds functions to save and restore GICv3 ITS registers during system suspend. Please note that the power management of GIC ITS is implementation defined. These functions only implements the architectural part of the ITS power management and they do not restore memory structures or register content required to support ITS. Even if the ITS implementation stores structures in memory, an implementation defined power down sequence is likely to be required to flush some internal ITS caches to memory. If such implementation defined sequence is not followed, the platform must ensure that the ITS is not power gated during system suspend. Change-Id: I5f31e5541975aa7dcaab69b0b7f67583c0e27678 Signed-off-by: Soby Mathew <soby.mathew@arm.com> Signed-off-by: Douglas Raillard <douglas.raillard@arm.com>
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Soby Mathew authored
During system suspend, the GICv3 Distributor and Redistributor context can be lost due to power gating of the system power domain. This means that the GICv3 context needs to be saved prior to system suspend and restored on wakeup. Currently the consensus is that the Firmware should be in charge of this. See tf-issues#464 for more details. This patch introduces helper APIs in the GICv3 driver to save and restore the Distributor and Redistributor contexts. The GICv3 ITS context is not considered in this patch because the specification says that the details of ITS power management is implementation-defined. These APIs are expected to be appropriately invoked by the platform layer during system suspend. Fixes ARM-software/tf-issues#464 Change-Id: Iebb9c6770ab8c4d522546f161fa402d2fe02ec00 Signed-off-by: Soby Mathew <soby.mathew@arm.com> Signed-off-by: Douglas Raillard <douglas.raillard@arm.com>
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- 03 May, 2017 1 commit
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dp-arm authored
To make software license auditing simpler, use SPDX[0] license identifiers instead of duplicating the license text in every file. NOTE: Files that have been imported by FreeBSD have not been modified. [0]: https://spdx.org/ Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761a Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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- 15 Dec, 2016 1 commit
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Jeenu Viswambharan authored
Some GICv3 implementations have provision for power management operations at Redistributor level. This patch introduces and provides place-holders for Redistributor power management. The default implementations are empty stubs, but are weakly bound so as to enable implementation-specific drivers to override them. Change-Id: I4fec1358693d3603ca5dce242a2f7f0e730516d8 Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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- 27 Jul, 2016 1 commit
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Soby Mathew authored
This patch fixes the offset of GICD_IROUTER register defined in gicv3.h. Although the GICv3 documention mentions that the offset for this register is 0x6100-0x7FD8, the offset calculation for an interrupt id `n` is : 0x6000 + 8n, where n >= 32 This requires the offset for GICD_IROUTER to be defined as 0x6000. Fixes ARM-software/tf-issues#410 Change-Id: If9e91e30d946afe7f1f60fea4f065c7567093fa8
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- 18 Jul, 2016 1 commit
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Soby Mathew authored
This patch reworks type usage in generic code, drivers and ARM platform files to make it more portable. The major changes done with respect to type usage are as listed below: * Use uintptr_t for storing address instead of uint64_t or unsigned long. * Review usage of unsigned long as it can no longer be assumed to be 64 bit. * Use u_register_t for register values whose width varies depending on whether AArch64 or AArch32. * Use generic C types where-ever possible. In addition to the above changes, this patch also modifies format specifiers in print invocations so that they are AArch64/AArch32 agnostic. Only files related to upcoming feature development have been reworked. Change-Id: I9f8c78347c5a52ba7027ff389791f1dad63ee5f8
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- 04 Dec, 2015 1 commit
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Soby Mathew authored
This patch renames the GICv3 interrupt group macros from INT_TYPE_G0, INT_TYPE_G1S and INT_TYPE_G1NS to INTR_GROUP0, INTR_GROUP1S and INTR_GROUP1NS respectively. Change-Id: I40c66f589ce6234fa42205adcd91f7d6ad8f33d4
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- 26 Nov, 2015 1 commit
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Achin Gupta authored
This patch adds a driver for ARM GICv3 systems that need to run software stacks where affinity routing is enabled across all privileged exception levels for both security states. This driver is a partial implementation of the ARM Generic Interrupt Controller Architecture Specification, GIC architecture version 3.0 and version 4.0 (ARM IHI 0069A). The driver does not cater for legacy support of interrupts and asymmetric configurations. The existing GIC driver has been preserved unchanged. The common code for GICv2 and GICv3 systems has been refactored into a new file, `drivers/arm/gic/common/gic_common.c`. The corresponding header is in `include/drivers/arm/gic_common.h`. The driver interface is implemented in `drivers/arm/gic/v3/gicv3_main.c`. The corresponding header is in `include/drivers/arm/gicv3.h`. Helper functions are implemented in `drivers/arm/gic/v3/arm_gicv3_helpers.c` and are accessible through the `drivers/arm/gic/v3/gicv3_private.h` header. Change-Id: I8c3c834a1d049d05b776b4dcb76b18ccb927444a
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