- 22 Apr, 2021 1 commit
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Shubhrajyoti Datta authored
Add support for the trapping the IPI in TF-A. Register handler for the irq no 62 which is the IPI interrupt. Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Change-Id: I9c04fdae7be3dda6a34a9b196274c0b5fdf39223 Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
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- 21 Apr, 2021 1 commit
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Venkatesh Yadav Abbarapu authored
Add support for CRC checksum for IPI data when the macro IPI_CRC_CHECK is enabled. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> Change-Id: I3c25c715885759076055c6505471339b5d6edcd5
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- 01 Apr, 2021 1 commit
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Venkatesh Yadav Abbarapu authored
As per the new multi-console framework, updating the JTAG DCC support. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Change-Id: I77994ce387caf0d695986df3d01d414a920978d0
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- 19 Mar, 2021 1 commit
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Tejas Patel authored
BIT24 of IPI command header is used to determine if caller is secure or non-secure. Mark BIT24 of IPI command header as non-secure if SMC caller is non-secure. Signed-off-by: Tejas Patel <tejas.patel@xilinx.com> Signed-off-by: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com> Change-Id: Iec25af8f4b202093f58e858ee47cd9cd46890267
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- 16 Mar, 2021 1 commit
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Michal Simek authored
Versal is a72 based that's why there is no reason to build low level assemble code for a53. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Change-Id: Iff9cf2582102d951825b87fd9af18e831ca717d6
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- 20 Jan, 2021 1 commit
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Rajan Vaja authored
Some switch cases uses same operation. So, club switch cases which uses same operation and remove duplicate code. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Change-Id: I260b474c0ff3f2ca102c32d4af2e4abba2b8f57c
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- 11 Jan, 2021 1 commit
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Venkatesh Yadav Abbarapu authored
This patch fixes the non compliant code like missing braces for conditional single statement bodies. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> Change-Id: I95b410ae5950f85dc913c4448fcd0a97e0fd490c
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- 10 Dec, 2020 1 commit
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Manish Pandey authored
Signed-off-by: Manish Pandey <manish.pandey2@arm.com> Change-Id: Icef550072296d6aba89a0827dd72d0b86047556f
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- 07 Dec, 2020 9 commits
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Tejas Patel authored
Add support of register notifier. Signed-off-by: Tejas Patel <tejas.patel@xilinx.com> Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Change-Id: I41ef4c63abcc9aee552790b843adb25a5fd0c23e
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Tejas Patel authored
Add support to get clock's rate value. Signed-off-by: Tejas Patel <tejas.patel@xilinx.com> Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Change-Id: I3ed881053ef323b2ca73e13edd0affda860d381d
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Tejas Patel authored
Add support of set max latency, to change in the maximum powerup latency requirements for a specific device currently used by Subsystem. Signed-off-by: Tejas Patel <tejas.patel@xilinx.com> Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Change-Id: I8749886abb1a7884a42c4d156d89c9cd562a5b1a
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Ravi Patel authored
Add support to call InitFinalize API in Versal which calls corresponding LibPM API. Signed-off-by: Ravi Patel <ravi.patel@xilinx.com> Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Change-Id: I3428b7245b4db1ef6db8a90b7ad20b6e484ed3b2
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Rajan Vaja authored
For the current XilPM calls, The handler of IPI returns information with 16 Bytes data. So during QueryData API call for the ClockName and PinFunctionName, response data(name of clock or function) response[0..3] are used to return name. And status is not being returned for such API. Updated XilPM calls reply in a consistent way and The handler of IPI return information with 32Bytes data. Where response[0] always set to status. For the version-2 of QueryData API, during call for the ClockName and PinFunctionName, response data(name of clock or function) get as response[1...4]. To support both the version of QueryData API, added version based compatibility by the use of feature check. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> Signed-off-by: Amit Sunil Dhamne <amit.sunil.dhamne@xilinx.com> Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Change-Id: I336128bff7bbe659903b0f8ce20ae6da7e3b51b4
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Venkatesh Yadav Abbarapu authored
In JTAG mode check the ATF handoff structure, if the magic string is not present then use bl32 and bl33 default values. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Change-Id: I1f2c4a2060d8a2e70d3b5fb2473124b685f257fc
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Ravi Patel authored
GIC registers needs to be stored/restored during system suspend/resume only and not during CPU idle. During CPU idle, minimum 1 CPU is in ON state. Signed-off-by: Ravi Patel <ravi.patel@xilinx.com> Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Change-Id: I5de2ce3a61bf4260f9385349202b0f592a47aaba
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Venkatesh Yadav Abbarapu authored
Add below API in feature check list which is actually present in firmware: - PM_GET_CHIPID Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> Signed-off-by: Ravi Patel <ravi.patel@xilinx.com> Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Change-Id: I98b82da74164f065c8835861f74b0f2855e9bcbf
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Ravi Patel authored
Existing code passes ACPU0 to LibPM as node_id in set_wakeup_source() call because last suspending core will be ACPU0 in most of the case. Now it may be possible that user may disable the ACPU0 using hot-plug and after that it suspends Linux. So in that case ACPU0 will not be last suspending core. To overcome above scenario, pass the current running processor ID while calling set_wakeup_source(). Signed-off-by: Ravi Patel <ravi.patel@xilinx.com> Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Change-Id: If15354c2150b5bb1305b5f93ca4e8c7a81d59f0a
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- 30 Mar, 2020 2 commits
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Manish V Badarkhe authored
Moved SMCCC defines from plat_arm.h to new <smccc_def.h> header and include this header in all ARM platforms. Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com> Change-Id: I4cbc69c7b9307461de87b7c7bf200dd9b810e485
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Alexei Fedorov authored
This patch moves all GICv3 driver files into new added 'gicv3.mk' makefile for the benefit of the generic driver which can evolve in the future without affecting platforms. The patch adds GICv3 driver configuration flags 'GICV3_IMPL', 'GICV3_IMPL_GIC600_MULTICHIP' and 'GICV3_OVERRIDE_DISTIF_PWR_OPS' described in 'GICv3 driver options' section of 'build-option.rst' document. NOTE: Platforms with GICv3 driver need to be modified to include 'drivers/arm/gic/v3/gicv3.mk' in their makefiles. Change-Id: If055f6770ff20f5dee5a3c99ae7ced7cdcac5c44 Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
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- 10 Mar, 2020 1 commit
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Alexei Fedorov authored
This patch provides separation of GICD, GICR accessor functions and adds new macros for GICv3 registers access as a preparation for GICv3.1 and GICv4 support. NOTE: Platforms need to modify to include both 'gicdv3_helpers.c' and 'gicrv3_helpers.c' instead of the single helper file previously. Change-Id: I1641bd6d217d6eb7d1228be3c4177b2d556da60a Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
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- 25 Feb, 2020 1 commit
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Andre Przywara authored
Since now the generic console_t structure holds the UART base address as well, let's use that generic location and drop the UART driver specific data structure at all. Change-Id: I7a23327394d142af4b293ea7ccd90b843c54587c Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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- 30 Jan, 2020 1 commit
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Tejas Patel authored
pm_get_callbackdata() expect result count and not total bytes of result. Correct it by passing result count to pm_get_callbackdata(). Signed-off-by: Tejas Patel <tejas.patel@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Change-Id: I01ce0002f7a753e81ea9fe65edde8420a13ed51a
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- 24 Jan, 2020 1 commit
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Deepika Bhavnani authored
PLATFORM_CORE_COUNT - Unsigned int PLATFORM_CLUSTER_COUNT - Unsigned int PLATFORM_MAX_CPUS_PER_CLUSTER - Unsigned int PLATFORM_CORE_COUNT_PER_CLUSTER - Unsigned int Signed-off-by: Deepika Bhavnani <deepika.bhavnani@arm.com> Change-Id: I76f5535f1cbdaf3fc1235cd824111d9afe8f7e1b
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- 23 Jan, 2020 1 commit
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Venkatesh Yadav Abbarapu authored
Parse the parameter structure the PLM populates, to populate the bl32 and bl33 image structures. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> Change-Id: I317072d1086f6cc6f90883c1b8b6d086ff57b443
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- 15 Jan, 2020 16 commits
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Tejas Patel authored
Move pm_client.h to common directory to avoid duplication of function declaration. Signed-off-by: Tejas Patel <tejas.patel@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Change-Id: Iea542e681f42db089cccd9b24d286ac8f0a2ce35
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Siva Durga Prasad Paladugu authored
This patch makes default build target as silicon instead of QEMU. The default can be overwritten by specifying it through build flag VERSAL_PLATFORM. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Change-Id: Ia4cb1df1f206db3e514e8ce969acca875e973ace
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Siva Durga Prasad Paladugu authored
Add new option for serial and default clock setup. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Change-Id: I0ca7ad51637cdaa6bb891f22c53595d20da7236a
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Venkatesh Yadav Abbarapu authored
ATF can't fit in current OCM size when the DEBUG is enabled, so increase the OCM size to use 128Kb. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Change-Id: I2ebfd1f2e9db9c0b28770aea7f8fbf1a8a15787a
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Siva Durga Prasad Paladugu authored
The IOU switch clock will be set by PLM during boot so there is no need to set here and hence this patch removes it. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Change-Id: I1512708411eb07a07c1a8fbd66575efee975431a
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Siva Durga Prasad Paladugu authored
This patch modifies cpu clock for Xilinx Versal virtual platform in order to keep same as used by QEMU. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Change-Id: I169d082462d7ce94a82c62966ab9eb122c5a3fee
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Saeed Nowshadi authored
This patch adds EEMI support for PM_GET_OPERATING_CHARACTERISTIC api id. This interface obtains operating characteristic of a device from PMC firmware. The 'power', 'temperature', and 'latency' characteristic are the options that are supported. Signed-off-by: Saeed Nowshadi <saeed.nowshadi@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Change-Id: If30959ba6a3a778a17df2a4281c2c09832cf7e92
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Ravi Patel authored
Add support for Get_ChipID API in Versal which calls corresponding LibPM API. Signed-off-by: Ravi Patel <ravi.patel@xilinx.com> Acked-by: Jolly Shah <jolly.shah@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Change-Id: I25c4b301721d7989d982ac376c59195c55564022
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Jolly Shah authored
This patch adds support for load pdi api to enable loading pdi from linux. Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Change-Id: I48549e276e1f7b9be45a0bebf559f73bd09d5f69
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Ravi Patel authored
Add API to check availability of given API in ATF as well as platform management controller and returns the supported version number. Signed-off-by: Ravi Patel <ravi.patel@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Change-Id: I608b38f60b36c4d105b7a205ecb8b02de0c00f3c
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Tejas Patel authored
Add support to set wakeup source for APU while suspending. Signed-off-by: Tejas Patel <tejas.patel@xilinx.com> Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Change-Id: I4809fd83a710def8144fdad74990c45e62b8fdf3
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Rajan Vaja authored
Add GET_CALLBACK_DATA function to get IPI callback data in Linux during init suspend callback. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Change-Id: Ieb60e561b5f656611f0702c43ba6a4296a012651
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Saeed Nowshadi authored
Add following APIs in plat_psci to support system shutdown & reset: - versal_system_off - versal_system_reset Signed-off-by: Saeed Nowshadi <saeed.nowshadi@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Change-Id: Ia2c1a19ded18984b393e1fdee760bf48b45e9902
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Tejas Patel authored
Add following APIs in plat_psci to support suspend resume: - versal_pwr_domain_off - versal_pwr_domain_suspend - versal_pwr_domain_suspend_finish - versal_validate_power_state - versal_get_sys_suspend_power_state Signed-off-by: Tejas Patel <tejas.patel@xilinx.com> Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Change-Id: Ife908a45f32e2037c9c19e13211a8e4b373b8342
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Tejas Patel authored
Add PMC ops for power domain ON and remove no_pmc ops. Signed-off-by: Tejas Patel <tejas.patel@xilinx.com> Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Change-Id: Id4308dfe124b60a751765beb3397d1b0071f14fc
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Tejas Patel authored
Implement set wakeup source API to pass SMC call for set wakeup source to PLM (Platform Loader and Manager). Signed-off-by: Tejas Patel <tejas.patel@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Change-Id: I654ce07235c0fc7dfcb81bf98820153255f61537
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