1. 21 Jan, 2016 1 commit
    • Juan Castillo's avatar
      Disable PL011 UART before configuring it · 9400b40e
      Juan Castillo authored
      The PL011 TRM (ARM DDI 0183G) specifies that the UART must be
      disabled before any of the control registers are programmed. The
      PL011 driver included in TF does not disable the UART, so the
      initialization in BL2 and BL31 is violating this requirement
      (and potentially in BL1 if the UART is enabled after reset).
      
      This patch modifies the initialization function in the PL011
      console driver to disable the UART before programming the
      control registers.
      
      Register clobber list and documentation updated.
      
      Fixes ARM-software/tf-issues#300
      
      Change-Id: I839b2d681d48b03f821ac53663a6a78e8b30a1a1
      9400b40e
  2. 14 Sep, 2015 2 commits
  3. 11 Sep, 2015 1 commit
    • Vikram Kanigiri's avatar
      Use unified bakery locks API in Mediatek port · c3ec0b9e
      Vikram Kanigiri authored
      This patch update Mediatek port to use the `DEFINE_BAKERY_LOCK` macro instead of
      specifying the exact data structure to use for a bakery lock and the input
      linker section that it should be allocated to.
      
      Change-Id: I2116dbe27010bb46d7cc64fafef55c7240c4c721
      c3ec0b9e
  4. 18 Aug, 2015 2 commits
  5. 11 Aug, 2015 1 commit
    • CC Ma's avatar
      Initial platform port for MediaTek mt8173 · 7d116dcc
      CC Ma authored
      
      
      - Boot up 4 cores.
      - Add a generic UART driver.
      - Add generic CPU helper functions
      - Supoort suspend
      - Add system_off & system_reset implementation
      - Add crash console reporting implementation
      - Add get_sys_suspend_power_state() for PSCI 1.0 SYSTEM_SUSPEND
      - Add Mediatek SIP runtime service
      - Add delay timer platform implementation
      
      Change-Id: I44138249f115ee10b9cbd26fdbc2dd3af04d825f
      Signed-off-by: default avatarCC Ma <cc.ma@mediatek.com>
      Signed-off-by: default avatarJimmy Huang <jimmy.huang@mediatek.com>
      7d116dcc