- 03 Jun, 2021 1 commit
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Olivier Deprez authored
The SPMC at S-EL2 manages S-EL1 execution contexts for SPs. The currently running SP vCPU state is always saved when the SPMC exits to SPMD. A fresh vCPU context is always restored when the SPMC is entered from the SPMD and a SP resumed. For performance optimization reasons this permits omitting the saving/restoring of the S-EL1 context from within the EL3 SPMD on entering/exiting the SPMC. The S-EL2 SPMC and NS-EL1 context save/restore remain done in the SPMD. Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Change-Id: I66413ed5983913791ff5c9fc03c590ee65c6ccd7
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- 13 May, 2021 1 commit
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Daniel Boulby authored
Handle calls to the FFA_SPM_ID_GET interface. If FFA_SPM_ID_GET is invoked from the non-secure physical FF-A instance, return the SPMC id (defined in the SPMC manifest). If FFA_SPM_ID_GET is invoked from the secure physical FF-A instance (e.g. the SPMC), return the SPMD id. Change-Id: Id6d4e96b1da2510386d344e09c4553dba01227ec Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
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- 20 Apr, 2021 1 commit
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Olivier Deprez authored
In the case of a SP pre-empted by a non-secure interrupt, the SPMC returns to the SPMD through the FFA_INTERRUPT ABI. It is then forwarded to the normal world driver hinting the SP has to be resumed after the non-secure interrupt has been serviced. Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Change-Id: I51a694dddcb8ea30fa84e1f11d018bc2abec0a56
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- 19 Mar, 2021 1 commit
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J-Alves authored
FF-A specification states that error codes should be typed int32_t. SPMD's uses uint64_t for return values, which if assigned with a signed type would have sign extension, and change the size of the return from 32-bit to 64-bit. Signed-off-by: J-Alves <joao.alves@arm.com> Change-Id: I288ab2ffec8330a2fe1f21df14e22c34bd83ced3
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- 15 Mar, 2021 1 commit
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Olivier Deprez authored
Remove the former impdef SPMD service for SPMC entry point registration. Replace with FFA_SECONDARY_EP_REGISTER ABI providing a single entry point address into the SPMC for primary and secondary cold boot. Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Change-Id: I067adeec25fc12cdae90c15a616903b4ac4d4d83
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- 18 Feb, 2021 1 commit
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Max Shvetsov authored
This reverts commit bedb13f5. SIMD context is now saved in S-EL2 as opposed to EL3, see commit: https://review.trustedfirmware.org/c/hafnium/hafnium/+/8321 Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com> Change-Id: Ic81416464ffada1a6348d0abdcf3adc7c1879e61
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- 12 Feb, 2021 1 commit
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Olivier Deprez authored
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Change-Id: I8ed58ec5f97e05d91451020a2739464bb8e428b3
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- 07 Sep, 2020 1 commit
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Max Shvetsov authored
spmd_get_context_by_mpidr was using potentially negative value as an array index. plat_core_pos_by_mpidr could return -1 on failure which is utilized by some platforms. Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com> Change-Id: I7f8827e77f18da389c9cafdc1fc841aba9f03120
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- 01 Sep, 2020 1 commit
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Varun Wadekar authored
This patch removes the assert that expects the SPMC PC value to be same as BL32_BASE. This assumption is not true for all platforms e.g. Tegra, and so will be removed from the SPMD. Platforms can always add this check to the platform files, if required. Change-Id: Ic40620b43d160feb4f72f4af18e6d01861d4bf37 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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- 21 Aug, 2020 1 commit
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Ruari Phipps authored
Signed-off-by: Ruari Phipps <ruari.phipps@arm.com> Change-Id: I4e9fbfcfda4ed4b87d5ece1c609c57c73d617d4c
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- 20 Aug, 2020 7 commits
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Olivier Deprez authored
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com> Change-Id: Icdb15b8664fb3467ffd55b44d1f0660457192586
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Olivier Deprez authored
Define SPMD PM hooks for warm boot and off events. svc_on_finish handler enters the SPMC at the entry point defined by the secondary EP register service. The svc_off handler notifies the SPMC that a physical core is being turned off through a notification message. Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Change-Id: I2609a75a0c6ffb9f6313fc09553be2b29a41de59
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Olivier Deprez authored
Upon booting, the SPMC running on the primary core shall register the secondary core entry points to which a given secondary core being woken up shall jump to into the SPMC . The current implementation assumes the SPMC calls a registering service implemented in the SPMD for each core identified by its MPIDR. This can typically happen in a simple loop implemented in the early SPMC initialization routines by passing each core identifier associated with an entry point address and context information. This service is implemented on top of a more generic SPMC<=>SPMD interface using direct request/response message passing as defined by the FF-A specification. Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com> Change-Id: I1f70163b6b5cee0880bd2004e1fec41e3780ba35
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Olivier Deprez authored
FF-A interface to handle SPMC to SPMD direct messages requests. Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com> Change-Id: Ia707a308c55561a31dcfa86e554ea1c9e23f862a
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Olivier Deprez authored
Change-Id: If88d64c0e3d60accd2638a55f9f3299ec700a8c8 Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
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Olivier Deprez authored
This patch adds SPMC states used by the SPMD to track SPMC boot phases specifically on secondary cores. Change-Id: If97af7352dda7f04a8e46a56892a2aeddcfab91b Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com>
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Olivier Deprez authored
This patch provides a helper to get the entry_point_info structure used by the boot CPU as it is used to initialise the SPMC context on secondary CPUs. Change-Id: I99087dc7a86a7258e545d24a2ff06aa25170f00c Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
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- 23 Jun, 2020 1 commit
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J-Alves authored
Change handler of FFA version interface: - Return SPMD's version if the origin of the call is secure; - Return SPMC's version if origin is non-secure. Signed-off-by: J-Alves <joao.alves@arm.com> Change-Id: I0d1554da79b72b1e02da6cc363a2288119c32f44
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- 25 May, 2020 1 commit
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J-Alves authored
SPCI is renamed as PSA FF-A which stands for Platform Security Architecture Firmware Framework for A class processors. This patch replaces the occurrence of SPCI with PSA FF-A(in documents) or simply FFA(in code). Change-Id: I4ab10adb9ffeef1ff784641dfafd99f515133760 Signed-off-by: J-Alves <joao.alves@arm.com>
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- 13 May, 2020 2 commits
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Olivier Deprez authored
Currently BL2 passes TOS_FW_CONFIG address and size through registers to BL31. This corresponds to SPMC manifest load address and size. The SPMC manifest is mapped in BL31 by dynamic mapping. This patch removes BL2 changes from generic code (which were enclosed by SPD=spmd) and retrieves SPMC manifest size directly from within SPMD. The SPMC manifest load address is still passed through a register by generic code. Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Change-Id: I35c5abd95c616ae25677302f0b1d0c45c51c042f
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Olivier Deprez authored
As a follow-up to bdd2596d , and related to SPM Dispatcher EL3 component and SPM Core S-EL2/S-EL1 component: update with cosmetic and coding rules changes. In addition: -Add Armv8.4-SecEL2 arch detection helper. -Add an SPMC context (on current core) get helper. -Return more meaningful error return codes. -Remove complexity in few spmd_smc_handler switch-cases. -Remove unused defines and structures from spmd_private.h Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Change-Id: I99e642450b0dafb19d3218a2f0e2d3107e8ca3fe
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- 12 Mar, 2020 1 commit
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Max Shvetsov authored
This patch introduces the `SPCI_ID_GET` interface which will return the ID of the calling SPCI component. Returns 0 for requests from the non-secure world and the SPCI component ID as specified in the manifest for secure world requests. Change-Id: Icf81eb1d0e1d7d5c521571e04972b6e2d356e0d1 Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com> Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
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- 03 Mar, 2020 3 commits
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Max Shvetsov authored
Added SPMD_SPM_AT_SEL2 build command line parameter. Set to 1 to run SPM at S-EL2. Set to 0 to run SPM at S-EL1 (pre-v8.4 or S-EL2 is disabled). Removed runtime EL from SPM core manifest. Change-Id: Icb4f5ea4c800f266880db1d410d63fe27a1171c0 Signed-off-by: Artsem Artsemenka <artsem.artsemenka@arm.com> Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com>
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Olivier Deprez authored
Change-Id: Icc8f73660453a2cbb2241583684b615d5d1af9d4 Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
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Max Shvetsov authored
Change-Id: I8881d489994aea667e3dd59932ab4123f511d6ba Signed-off-by: Artsem Artsemenka <artsem.artsemenka@arm.com> Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com>
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- 02 Mar, 2020 1 commit
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Max Shvetsov authored
NOTE: Not all EL-2 system registers are saved/restored. This subset includes registers recognized by ARMv8.0 Change-Id: I9993c7d78d8f5f8e72d1c6c8d6fd871283aa3ce0 Signed-off-by: Jose Marinho <jose.marinho@arm.com> Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Signed-off-by: Artsem Artsemenka <artsem.artsemenka@arm.com> Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com>
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- 10 Feb, 2020 1 commit
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Achin Gupta authored
This patch adds a rudimentary SPM dispatcher component in EL3. It does the following: - Consumes the TOS_FW_CONFIG to determine properties of the SPM core component - Initialises the SPM core component which resides in the BL32 image - Implements a handler for SPCI calls from either security state. Some basic validation is done for each call but in most cases it is simply forwarded as-is to the "other" security state. Signed-off-by: Achin Gupta <achin.gupta@arm.com> Signed-off-by: Artsem Artsemenka <artsem.artsemenka@arm.com> Change-Id: I7d116814557f7255f4f4ebb797d1619d4fbab590
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