- 07 Dec, 2018 1 commit
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Julius Werner authored
This patch makes the build system link the console framework code by default, like it already does with other common libraries (e.g. cache helpers). This should not make a difference in practice since TF is linked with --gc-sections, so the linker will garbage collect all functions and data that are not referenced by any other code. Thus, if a platform doesn't want to include console code for size reasons and doesn't make any references to console functions, the code will not be included in the final binary. To avoid compatibility issues with older platform ports, only make this change for the MULTI_CONSOLE_API. Change-Id: I153a9dbe680d57aadb860d1c829759ba701130d3 Signed-off-by: Julius Werner <jwerner@chromium.org>
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- 26 Oct, 2018 3 commits
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Antonio Nino Diaz authored
There seems to be a problem where SCP can't turn CPU0 off. Instead of returning PSCI_E_DENIED or crashing make CPU0 wait in a WFE loop. This way all CPUs have a consistent behaviour from the point of view of the caller. Change-Id: I5c8c266ca3b69c9e7a4f5ae70afeea5dd36a0825 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
This works fine for CPU1-3, but it fails for CPU0, where it is simply ignored and leaves CPU0 in a WFI loop. Change-Id: I7d73683fdd894f2021d6a5bc2cce6cd03e18e633 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
The Amlogic Meson S905 is a SoC with a quad core Arm Cortex-A53 running at 1.5Ghz. It also contains a Cortex-M3 used as SCP. This port is a minimal implementation of BL31 capable of booting mainline U-Boot and Linux: - Partial SCPI support. - Basic PSCI support (CPU_ON, SYSTEM_RESET, SYSTEM_OFF). - GICv2 driver set up. - Basic SIP services (read efuse data, enable/disable JTAG). This port has been tested in an ODROID-C2. Change-Id: Ia4bc82d7aca42a69d6b118b947279f82b3f6c6da Tested-by: Amit Singh Tomar <amittomer25@gmail.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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