1. 12 Jun, 2015 1 commit
    • Varun Wadekar's avatar
      Reserve a Video Memory aperture in DRAM memory · 9a964510
      Varun Wadekar authored
      
      
      This patch adds support to reserve a memory carveout region in the
      DRAM on Tegra SoCs. The memory controller provides specific registers
      to specify the aperture's base and size. This aperture can also be
      changed dynamically in order to re-size the memory available for
      DRM video playback. In case of the new aperture not overlapping
      the previous one, the previous aperture has to be cleared before
      setting up the new one. This means we do not "leak" any video data
      to the NS world.
      Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
      9a964510
  2. 29 May, 2015 1 commit
    • Varun Wadekar's avatar
      Support for NVIDIA's Tegra T210 SoCs · 08438e24
      Varun Wadekar authored
      
      
      T210 is the latest chip in the Tegra family of SoCs from NVIDIA. It is an
      ARM v8 dual-cluster (A57/A53) SoC, with any one of the clusters being active
      at a given point in time.
      
      This patch adds support to boot the Trusted Firmware on T210 SoCs. The patch
      also adds support to boot secondary CPUs, enter/exit core power states for
      all CPUs in the slow/fast clusters. The support to switch between clusters
      is still not available in this patch and would be available later.
      Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
      08438e24