- 11 Sep, 2019 1 commit
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Carlo Caione authored
As part of the code refactoring fix the order of the include files across all the source files. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Change-Id: Ice72f687cc26ee881a9051168149467688100cfb
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- 05 Sep, 2019 8 commits
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Carlo Caione authored
Remove the GXBB prefix where needed and add SoC specific prefixes for GXBB/GXL. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Change-Id: Ic3eb3a77ca2d9c779a9dee5cee786e9c16ecdb27
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Carlo Caione authored
Add a new aml_* prefix to the SCPI related function calls. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Change-Id: I697812ac1c0df28cbb639a1dc3e838f1107fb739
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Carlo Caione authored
Make the MHU code AML specific adding a new aml_* prefix and remove the GXBB prefix from the register names. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Change-Id: I8f20918e29f08542bd71bd679f88e65b4efaa7d2
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Carlo Caione authored
No need to have a special SoC-specific prefix. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Change-Id: I0da543e7d92d56604e79440a98027ffd9a2eaa59
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Carlo Caione authored
The header file is shared between all the SoCs. Better avoiding hardcoding the SoC name in the function names. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Change-Id: I9074871bd1ed8a702c1a656e0f50f2d3c6cb0425
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Carlo Caione authored
Fixing at the same time the related register names. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Change-Id: Ib1130d50abe6088f1c0826878d1ae454a0f23008
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Carlo Caione authored
Now that also the SHA256 DMA driver is shared between all the SoCs, we can have one single private platform header file. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Change-Id: I77d51915f9d8233aeceeed66ed1f491573402cfc
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Carlo Caione authored
Meson is the internal code name for the SoC family. The correct name for the platform should be Amlogic. Change the name of the platform directory. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Change-Id: Icc140e1ea137f12117acbf64c7dcb1a8b66b345d
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- 02 Aug, 2019 1 commit
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Remi Pommarel authored
Before CPU enters standby state (wfi), the AP needs to signal the SCP through PSCI mailbox. Also at boot time the AP has to wait for the SCP to be ready before sending the first scpi commands or it can crash. Change-Id: Iacc99f5bec745ad71922c5ea07ca5b87088133b6 Signed-off-by: Remi Pommarel <repk@triplefau.lt>
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- 16 May, 2019 1 commit
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Kevin Hilman authored
Remove an assert() that assumes a specific value being passed from BL2. This value is dependent on BL2 version, so makes this assert() not portable. Suggested-by: Remi Pommarel <repk@triplefau.lt> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Change-Id: Ife3d934b2fa37fc1c66963dd4eb1afe2ca17d740
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- 02 Apr, 2019 2 commits
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Remi Pommarel authored
On Amlogic gxl (s905x) SOC, in order to use SCP, bl31 has to send bl30 and bl301 firmware along with their SHA256 hash over scpi. Signed-off-by: Remi Pommarel <repk@triplefau.lt>
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Antonio Nino Diaz authored
The Amlogic Meson S905x is a SoC with a quad core Arm Cortex-A53 running at 1.5Ghz. It also contains a Cortex-M3 used as SCP. This port is a minimal implementation of BL31 capable of booting mainline U-Boot and Linux: - Partial SCPI support. - Basic PSCI support (CPU_ON, SYSTEM_RESET, SYSTEM_OFF). - GICv2 driver set up. - Basic SIP services (read efuse data, enable/disable JTAG). This port has been tested on a lepotato. Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Signed-off-by: Remi Pommarel <repk@triplefau.lt>
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- 04 Jan, 2019 1 commit
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Antonio Nino Diaz authored
Enforce full include path for includes. Deprecate old paths. The following folders inside include/lib have been left unchanged: - include/lib/cpus/${ARCH} - include/lib/el3_runtime/${ARCH} The reason for this change is that having a global namespace for includes isn't a good idea. It defeats one of the advantages of having folders and it introduces problems that are sometimes subtle (because you may not know the header you are actually including if there are two of them). For example, this patch had to be created because two headers were called the same way: e0ea0928 ("Fix gpio includes of mt8173 platform to avoid collision."). More recently, this patch has had similar problems: 46f9b2c3 ("drivers: add tzc380 support"). This problem was introduced in commit 4ecca339 ("Move include and source files to logical locations"). At that time, there weren't too many headers so it wasn't a real issue. However, time has shown that this creates problems. Platforms that want to preserve the way they include headers may add the removed paths to PLAT_INCLUDES, but this is discouraged. Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 26 Oct, 2018 1 commit
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Antonio Nino Diaz authored
The Amlogic Meson S905 is a SoC with a quad core Arm Cortex-A53 running at 1.5Ghz. It also contains a Cortex-M3 used as SCP. This port is a minimal implementation of BL31 capable of booting mainline U-Boot and Linux: - Partial SCPI support. - Basic PSCI support (CPU_ON, SYSTEM_RESET, SYSTEM_OFF). - GICv2 driver set up. - Basic SIP services (read efuse data, enable/disable JTAG). This port has been tested in an ODROID-C2. Change-Id: Ia4bc82d7aca42a69d6b118b947279f82b3f6c6da Tested-by: Amit Singh Tomar <amittomer25@gmail.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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