1. 10 May, 2017 1 commit
  2. 03 May, 2017 1 commit
  3. 04 Apr, 2017 1 commit
  4. 01 Mar, 2017 1 commit
  5. 24 Oct, 2016 1 commit
    • Caesar Wang's avatar
      rockchip: clear the power mode status via M0 · 7ac52006
      Caesar Wang authored
      
      
      Due to the PMU design, the PMU may not clear the WAKEUP bit after
      wakeup, therefore, the state machine at the power mode may enter
      the infinite loop during WFI.
      
      There is a solution that we can use the M0 to monitor the WAKEUP
      bit and clear it during power mode, then the state machine will be
      recovered immediately. Then, the DUT can exit the WFI normally.
      
      Change-Id: I303628553b728c214bf2d436bd3122032b5e669c
      Signed-off-by: default avatarXing Zheng <zhengxing@rock-chips.com>
      Signed-off-by: default avatarCaesar Wang <wxt@rock-chips.com>
      7ac52006
  6. 09 Sep, 2016 1 commit
    • Caesar Wang's avatar
      rockchip: fixes some typo · 7e1bedb6
      Caesar Wang authored
      As the checkpatch reports the warning or error.
      
      plat/rockchip/common/plat_pm.c:96:
      ERROR: do not set execute permissions for source files
      plat/rockchip/rk3399/drivers/pmu/pmu.c:294:
      ERROR: do not set execute permissions for source files
      
      plat/rockchip/common/plat_pm.c:286: WARNING: line over 80 characters
      plat/rockchip/common/plat_pm.c:287: WARNING: line over 80 characters
      
      Change-Id: Ib347da21c56551c31df3f90f03777b13c75d5c26
      7e1bedb6
  7. 08 Sep, 2016 1 commit
    • Tony Xie's avatar
      rockchip: fix the scu idle for rk3399 · 63ebf051
      Tony Xie authored
      As rk3399 reported the d8/octane scores drop 10% with cpu idle.
      The root cause is thc cpu cluster enter the slow mode.
      We don't need switch the clock to 24MHz if cpu cluster enter the
      retention mode. In order to improve performance, it just needs for
      cluster enter powering off mode.
      
      Also, we shouldn't do anything for hlvl if the system is off.
      
      Change-Id: I2a02962a01343abd0cba47ed63192c1cdf88b119
      63ebf051
  8. 25 Aug, 2016 1 commit
  9. 18 Jul, 2016 1 commit
    • Tony Xie's avatar
      rockchip: support the suspend/resume for rk3399 · 9ec78bdf
      Tony Xie authored
      1.Fixes the suspend/resume some bugs.
      2.Add the power domain for saving power consumption.
      3.Add cpu clusters suspend for rk3399 SoCs
      
      Change-Id: Id602779016b41d6281f4ba40a20229d909b28e46
      9ec78bdf
  10. 27 May, 2016 1 commit
  11. 04 May, 2016 1 commit
  12. 05 Apr, 2016 1 commit
    • Tony Xie's avatar
      Support for Rockchip's family SoCs · 6fba6e04
      Tony Xie authored
      
      
      This patch adds to support the RK3368 and RK3399 SoCs.
      
      RK3368/RK3399 is one of the Rockchip family SoCs, which is an
      multi-cores ARM SoCs.
      
      This patch adds support to boot the Trusted Firmware on RK3368/RK3399
      SoCs, and adds support to boot secondary CPUs, enter/exit core
      power states for all CPUs in the slow/fast clusters.
      
      This is the initial version for rockchip SoCs.(RK3368/RK3399 and next SoCs)
      * Support arm gicv2 & gicv3.
      * Boot up multi-cores CPU.
      * Add generic CPU helper functions.
      * Support suspend/resume.
      * Add system_off & system_reset implementation.
      * Add delay timer platform implementation.
      * Support the new porting interface for the PSCI implementation.
      
      Change-Id: I704bb3532d65e8c70dbd99b512c5e6e440ea6f43
      Signed-off-by: default avatarTony Xie <tony.xie@rock-chips.com>
      Signed-off-by: default avatarCaesar Wang <wxt@rock-chips.com>
      Signed-off-by: default avatarShengfei xu <xsf@rock-chips.com>
      6fba6e04