1. 17 Feb, 2014 2 commits
    • James Morrissey's avatar
      Implement load_image in terms of IO abstraction · 9d72b4ea
      James Morrissey authored
      The modified implementation uses the IO abstraction rather than
      making direct semi-hosting calls.  The semi-hosting driver is now
      registered for the FVP platform during initialisation of each boot
      stage where it is used.  Additionally, the FVP platform includes a
      straightforward implementation of 'plat_get_image_source' which
      provides a generic means for the 'load_image' function to determine
      how to access the image data.
      
      Change-Id: Ia34457b471dbee990c7b3c79de7aee4ceea51aa6
      9d72b4ea
    • James Morrissey's avatar
      Fix asserts appearing in release builds · 40a6f647
      James Morrissey authored
      Also fix warnings generated in release builds when assert code
      is absent.
      
      Change-Id: I45b9173d3888f9e93e98eb5b4fdc06727ba5cbf4
      40a6f647
  2. 20 Jan, 2014 3 commits
    • Achin Gupta's avatar
      psci: fix affinity level upgrade issue · 75f7367b
      Achin Gupta authored
      The psci implementation does not track target affinity level requests
      specified during cpu_suspend calls correctly as per the following
      example.
      
      1. cpu0.cluster0 calls cpu_suspend with the target affinity level as 0
      2. Only the cpu0.cluster0 is powered down while cluster0 remains
         powered up
      3. cpu1.cluster0 calls cpu_off to power itself down to highest
         possible affinity level
      4. cluster0 will be powered off even though cpu0.cluster0 does not
         allow cluster shutdown
      
      This patch introduces reference counts at affinity levels > 0 to track
      the number of cpus which want an affinity instance at level X to
      remain powered up. This instance can be turned off only if its
      reference count is 0. Cpus still undergo the normal state transitions
      (ON, OFF, ON_PENDING, SUSPEND) but the higher levels can only be
      either ON or OFF depending upon their reference count.
      
      The above issue is thus fixed as follows:
      
      1. cluster0's reference count is incremented by two when cpu0 and cpu1
         are initially powered on.
      
      2. cpu0.cluster0 calls cpu_suspend with the target affinity level as
         0. This does not affect the cluster0 reference count.
      
      3. Only the cpu0.cluster0 is powered down while cluster0 remains
         powered up as it has a non-zero reference count.
      
      4. cpu1.cluster0 call cpu_off to power itself down to highest possible
         affinity level. This decrements the cluster0 reference count.
      
      5. cluster0 is still not powered off since its reference count will at
         least be 1 due to the restriction placed by cpu0.
      
      Change-Id: I433dfe82b946f5f6985b1602c2de87800504f7a9
      75f7367b
    • Achin Gupta's avatar
      psci: preserve target affinity level during suspend · a45e3973
      Achin Gupta authored
      This patch adds support to save and restore the target affinity level
      specified during a cpu_suspend psci call. This ensures that we
      traverse only through the affinity levels that we originally intended
      to after resuming from suspend.
      
      Change-Id: I0900ae49a50b496da137cfec8f158da0397ec56c
      a45e3973
    • Achin Gupta's avatar
      psci: replace secure context with suspend context · a59caa4c
      Achin Gupta authored
      The secure context saved and restored across a cpu_suspend operation
      can be more than just the state of the secure system registers e.g. we
      also need to save the affinity level till which the cpu is being
      powered down. This patch creates a suspend_context data structure
      which includes the system register context. This will allow other bits
      to be saved and restored as well in subsequent patches.
      
      Change-Id: I1c1f7d25497388b54b7d6ee4fab77e8c6a9992c4
      a59caa4c
  3. 17 Jan, 2014 1 commit
  4. 12 Dec, 2013 1 commit
  5. 05 Dec, 2013 5 commits
    • Achin Gupta's avatar
      psci: rectify and homogenise generic code · 0959db5c
      Achin Gupta authored
      This patch performs a major rework of the psci generic implementation
      to achieve the following:
      
      1. replace recursion with iteration where possible to aid code
         readability e.g. affinity instance states are changed iteratively
         instead of recursively.
      
      2. acquire pointers to affinity instance nodes at the beginning of a
         psci operation. All subsequent actions use these pointers instead
         of calling psci_get_aff_map_node() repeatedly e.g. management of
         locks has been abstracted under functions which use these pointers
         to ensure correct ordering. Helper functions have been added to
         create these abstractions.
      
      3. assertions have been added to cpu level handlers to ensure correct
         state transition
      
      4. the affinity level extents specified to various functions have the
         same meaning i.e. start level is always less than the end level.
      
      Change-Id: If0508c3a7b20ea3ddda2a66128429382afc3dfc8
      0959db5c
    • Achin Gupta's avatar
      psci: rework cpu_off assertion and minor cleanups · 3140a9e5
      Achin Gupta authored
      This patch:
      
      1. removes a duplicate assertion to check that the only error
         condition that can be returned while turning a cpu off is
         PSCI_E_DENIED. Having this assertion after calling
         psci_afflvl_off() is sufficient.
      
      2. corrects some incorrect usage of 'its' vs 'it is'
      
      3. removes some unwanted white spaces
      
      Change-Id: Icf014e269b54f5be5ce0b9fbe6b41258e4ebf403
      3140a9e5
    • Achin Gupta's avatar
      psci: fix error due to a non zero context id · c8afc789
      Achin Gupta authored
      In the previous psci implementation, the psci_afflvl_power_on_finish()
      function would run into an error condition if the value of the context
      id parameter in the cpu_on and cpu_suspend psci calls was != 0. The
      parameter was being restored as the return value of the affinity level
      0 finisher function. A non zero context id would be treated as an
      error condition. This would prevent successful wake up of the cpu from
      a power down state. Also, the contents of the general purpose
      registers were not being cleared upon return to the non-secure world
      after a cpu power up. This could potentially allow the non-secure
      world to view secure data.
      
      This patch ensures that all general purpose registers are set to ~0
      prior to the final eret that drops the execution to the non-secure
      world. The context id is used to initialize the general purpose
      register x0 prior to re-entry into the non-secure world and is no
      longer restored as a function return value. A platform helper
      (platform_get_stack()) has been introduced to facilitate this change.
      
      Change-Id: I2454911ffd75705d6aa8609a5d250d9b26fa097c
      c8afc789
    • Dan Handley's avatar
      Enable third party contributions · ab2d31ed
      Dan Handley authored
      - Add instructions for contributing to ARM Trusted Firmware.
      
      - Update copyright text in all files to acknowledge contributors.
      
      Change-Id: I9311aac81b00c6c167d2f8c889aea403b84450e5
      ab2d31ed
    • Sandrine Bailleux's avatar
      Various improvements/cleanups on the linker scripts · 8d69a03f
      Sandrine Bailleux authored
        - Check at link-time that bootloader images will fit in memory
          at run time and that they won't overlap each other.
        - Remove text and rodata orphan sections.
        - Define new linker symbols to remove the need for platform setup
          code to know the order of sections.
        - Reduce the size of the raw binary images by cutting some sections
          out of the disk image and allocating them at load time, whenever
          possible.
        - Rework alignment constraints on sections.
        - Remove unused linker symbols.
        - Homogenize linker symbols names across all BLs.
        - Add some comments in the linker scripts.
      
      Change-Id: I47a328af0ccc7c8ab47fcc0dc6e7dd26160610b9
      8d69a03f
  6. 27 Nov, 2013 1 commit
    • Sandrine Bailleux's avatar
      Unmask SError and Debug exceptions. · 3738274d
      Sandrine Bailleux authored
      Any asynchronous exception caused by the firmware should be handled
      in the firmware itself.  For this reason, unmask SError exceptions
      (and Debug ones as well) on all boot paths.  Also route external
      abort and SError interrupts to EL3, otherwise they will target EL1.
      
      Change-Id: I9c191d2d0dcfef85f265641c8460dfbb4d112092
      3738274d
  7. 25 Oct, 2013 1 commit