- 27 Nov, 2018 2 commits
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Chandni Cherukuri authored
For platforms with multi-threaded CPUs, the number of power domains supported would be more than the value currently defined by PLAT_MAX_PWR_LVL. So move the PLAT_MAX_PWR_LVL macro to platform specific code and let the platform define the number of power domain levels. Change-Id: I21c0682e62b397860b2999031a0c9c5ce0d28eed Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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Chandni Cherukuri authored
The CSS_SYSTEM_PWR_DMN_LVL macro that defines the system power domain level is fixed at ARM_PWR_LVL2 for all CSS platforms. However, the system power domain level can be different for CSS platforms that use multi-threaded CPUs. So, in preparation towards adding support for platforms that use multi-threaded CPUs, refactor the definition of CSS_SYSTEM_PWR_DMN_LVL such that CSS_SYSTEM_PWR_DMN_LVL is uniquely defined for each of the CSS platform. Change-Id: Ia837b13f6865e71da01780993c048b45b7f36d85 Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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- 21 Nov, 2018 1 commit
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Vijayenthiran Subramaniam authored
Remove the platform common plat_arm_security_setup function to allow platform specific implementations of the security setup function implemented in the board directory of the platform. For use by secure software, configure region0 of DMC-620 trustzone controller to protect the upper 16MB of memory of the first DRAM block from non-secure accesses. Change-Id: I9a8c19656702c4fa4f6917b3655b692d443bb568 Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
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- 18 Oct, 2018 3 commits
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Chandni Cherukuri authored
Dynamically populating the 'system-id' node in the HW_CONFIG dts makes it difficult to enforce memory overlap checks. So add the system-id node in the HW_CONFIG dts file as a place holder with 'platform-id' and 'config-id' set to zero. The code at BL2 stage determines the values of 'platform-id' and 'config-id' at runtime and updates the corresponding fields in the system-id node of HW_CONFIG dts. Change-Id: I2ca9980b994ac418da8afa0c72716ede10aff68a Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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Chandni Cherukuri authored
To align the placement of ftds files with that of other Arm platforms, move the ftds files from plat/arm/css/sgi/ to plat/arm/board/sgi575. Change-Id: Id7c772eb5cf3d308d4e02a3c8099218e889a0e96 Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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Chandni Cherukuri authored
In preparation of adding support for upcoming SGI platforms, macros common to all the SGI platforms are moved into sgi_base_platform_def.h file. Macros that are specific to sgi575 platform remain in the platform_def.h file. In addition to this, the platform_def.h file is moved to sgi575 board directory. Also the ENT_CPU_SOURCES has been renamed to SGI_CPU_SOURCES and moved from sgi-common.mk to board specific makefile platform.mk Change-Id: Iccdd9f070f4feea232b9fbf4fdcc0ef2e8eccbf2 Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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- 10 Oct, 2018 1 commit
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Antonio Nino Diaz authored
This way it can be reused by other platforms if needed. Note that this driver is designed to work with the Versatile Express NOR flash of Juno and FVP. In said platforms, the memory is organized as an interleaved memory of two chips with a 16 bit word. Any platform that wishes to reuse it with a different configuration will need to modify the driver so that it is more generic. Change-Id: Ic721758425864e0cf42b7b9b04bf0d9513b6022e Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 21 Aug, 2018 1 commit
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Roberto Vargas authored
All the arm platforms were including the files related to mem-protect. This configuration generates some problems with new platforms that don't support such functionality, and for that reason this patch moves these files to the platform specific makefiles. Change-Id: I6923e5224668b76667795d8e11723cede7979b1e Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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- 28 Mar, 2018 1 commit
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Nariman Poushin authored
Add support for System Guidance for Infrastructure platform SGI575. Change-Id: I0125c2ed4469fbc8367dafcc8adce770b6b3147d Signed-off-by: Nariman Poushin <nariman.poushin@linaro.org>
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