1. 07 Apr, 2017 1 commit
  2. 05 Apr, 2017 2 commits
  3. 30 Mar, 2017 1 commit
    • Varun Wadekar's avatar
      Tegra186: implement `get_target_pwr_state` handler · f3a20c32
      Varun Wadekar authored
      
      
      This patch implements the `get_target_pwr_state` handler for Tegra186
      SoCs. The SoC port uses this handler to find out the cluster/system
      state during CPU_SUSPEND, CPU_OFF and SYSTEM_SUSPEND calls.
      
      The MCE firmware controls the power state of the CPU/CLuster/System,
      so we query it to get the state and act accordingly.
      
      Change-Id: I86633d8d79aec7dcb405d2301ac69910f93110fe
      Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
      f3a20c32
  4. 27 Mar, 2017 1 commit
  5. 23 Mar, 2017 5 commits
    • Varun Wadekar's avatar
      Tegra186: reset power state info during CPU_ON · b46ac6dc
      Varun Wadekar authored
      
      
      This patch resets the power state info for CPUs when onlining,
      as we set deepest power when offlining a core but that may not
      be requested by non-secure sw which controls idle states. It
      will re-init this info from non-secure software when the core
      come online.
      
      Original change by Prashant Gaikwad <pgaikwad@nvidia.com>
      
      Change-Id: Id6c2fa2b821c7705aafbb561a62348c36fd3abd8
      Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
      b46ac6dc
    • Varun Wadekar's avatar
      Tegra186: fix programming sequence for SC7/SC8 entry · 50f38a4a
      Varun Wadekar authored
      
      
      This patch fixes the programming sequence for 'System Suspend' and
      'Quasi power down' state entry. The device needs to update the
      required power state before querying the MCE firmware to see the
      entry to that power state is allowed.
      
      Original change by Allen Yu <alleny@nvidia.com>
      
      Change-Id: I65e03754322188af913fabf41f29d1c3595afd85
      Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
      50f38a4a
    • Varun Wadekar's avatar
      Tegra186: program default core wake mask during CPU_SUSPEND · 1b9ab054
      Varun Wadekar authored
      
      
      This patch programs the default CPU wake mask during CPU_SUSPEND. This
      reduces the CPU_SUSPEND latency as the system has to send one less SMC
      before issuing the actual suspend request.
      
      Original change by Krishna Sitaraman <ksitaraman@nvidia.com>
      
      Change-Id: I1f9351dde4ab30936070e9f42c2882fa691cbe46
      Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
      1b9ab054
    • Varun Wadekar's avatar
      Tegra186: clear the system cstate for offline core · c60f58ef
      Varun Wadekar authored
      
      
      This patch clears the system cstate when offlining a CPU core as we
      need to update the sytem cstate to SC7 only when we enter system
      suspend.
      
      Original change by Prashant Gaikwad <pgaikwad@nvidia.com>
      
      Change-Id: I1cff9bbab4db7d390a491c8939aea5db6c6b5c59
      Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
      c60f58ef
    • Varun Wadekar's avatar
      Tegra186: save/restore BL31 context to/from TZDRAM · 68c7de6f
      Varun Wadekar authored
      
      
      This patch adds support to save the BL31 state to the TZDRAM
      before entering system suspend. The TZRAM loses state during
      system suspend and so we need to copy the entire BL31 code to
      TZDRAM before entering the state.
      
      In order to restore the state on exiting system suspend, a new
      CPU reset handler is implemented which gets copied to TZDRAM
      during boot. TO keep things simple we use this same reset handler
      for booting secondary CPUs too.
      
      Change-Id: I770f799c255d22279b5cdb9b4d587d3a4c54fad7
      Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
      68c7de6f
  6. 22 Mar, 2017 1 commit
    • Varun Wadekar's avatar
      Tegra186: implement support for System Suspend · 50402b17
      Varun Wadekar authored
      
      
      This patch adds the chip level support for System Suspend entry
      and exit. As part of the entry sequence we first query the MCE
      firmware to check if it is safe to enter system suspend. Once
      we get a green light, we save hardware block settings and enter
      the power state. As expected, all the hardware settings are
      restored once we exit the power state.
      
      Change-Id: I6d192d7568d6a555eb10efdfd45f6d79c20f74ea
      Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
      50402b17
  7. 20 Mar, 2017 10 commits
  8. 28 Jan, 2015 3 commits
    • Juan Castillo's avatar
      stdlib: add missing features to build PolarSSL · e509d057
      Juan Castillo authored
      This patch adds the missing features to the C library included
      in the Trusted Firmware to build PolarSSL:
      
        - strcasecmp() function
        - exit() function
        - sscanf()* function
        - time.h header file (and its dependencies)
      
      * NOTE: the sscanf() function is not a real implementation. It just
      returns the number of expected arguments by counting the number of
      '%' characters present in the formar string. This return value is
      good enough for PolarSSL because during the certificate parsing
      only the return value is checked. The certificate validity period
      is ignored.
      
      Change-Id: I43bb3742f26f0bd458272fccc3d72a7f2176ab3d
      e509d057
    • Juan Castillo's avatar
      TBB: add a platform specific function to validate the ROTPK · 6eadf762
      Juan Castillo authored
      This patch adds the function plat_match_rotpk() to the platform
      porting layer to provide a Root Of Trust Public key (ROTPK)
      verification mechanism. This function is called during the
      Trusted Board Boot process and receives a supposed valid copy
      of the ROTPK as a parameter, usually obtained from an external
      source (for instance, a certificate). It returns 0 (success) if
      that key matches the actual ROTPK stored in the system or any
      other value otherwise.
      
      The mechanism to access the actual ROTPK stored in the system
      is platform specific and should be implemented as part of this
      function. The format of the ROTPK is also platform specific
      (to save memory, some platforms might store a hash of the key
      instead of the whole key).
      
      TRUSTED_BOARD_BOOT build option has been added to allow the user
      to enable the Trusted Board Boot features. The implementation of
      the plat_match_rotpk() funtion is mandatory when Trusted Board
      Boot is enabled.
      
      For development purposes, FVP and Juno ports provide a dummy
      function that returns always success (valid key). A safe trusted
      boot implementation should provide a proper matching function.
      
      Documentation updated accordingly.
      
      Change-Id: I74ff12bc2b041556c48533375527d9e8c035b8c3
      6eadf762
    • Juan Castillo's avatar
      TBB: add tool to generate certificates · 6f971622
      Juan Castillo authored
      This patch adds a tool that generates all the necessary elements
      to establish the chain of trust (CoT) between the images.
      
      The tool reads the binary images and signing keys and outputs the
      corresponding certificates that will be used by the target at run
      time to verify the authenticity of the images.
      
      Note: the platform port must provide the file platform_oid.h. This
      file will define the OIDs of the x509 extensions that will be added
      to the certificates in order to establish the CoT.
      
      Change-Id: I2734d6808b964a2107ab3a4805110698066a04be
      6f971622
  9. 21 Aug, 2014 2 commits
    • Sandrine Bailleux's avatar
      Juno: Add support for Test Secure-EL1 Payload · edfda10a
      Sandrine Bailleux authored
      This patch implements the TSP on Juno. It executes from on-chip Trusted
      SRAM.
      
      Also, the other bootloader images (i.e. BL1 R/W, BL2 and BL3-1) have
      been moved around. The reason is, although there was enough space
      overall to store the TSP in SRAM, there was no contiguous free chunk
      of SRAM big enough to hold it.
      
      This patch keeps the overall memory layout (i.e. keeping BL1 R/W at
      the bottom, BL2 at the top and BL3-1 in between) but moves the base
      addresses of all the bootloader images in such a way that:
       - memory fragmentation is reduced enough to fit BL3-2 in;
       - new base addresses are suitable for release builds as well as debug
         ones;
       - each image has a few extra kilobytes for future growth.
         BL3-1 and BL3-2 are the images which received the biggest allocations
         since they will most probably grow the most.
      
      This patch also adds instruction synchronization barriers around the code which
      handles the timer interrupt in the TSP. This ensures that the interrupt is not
      acknowledged after or EOIed before it is deactivated at the peripheral.
      
      Change-Id: I1c5b51858700027ee283ac85d18e06863a27c72e
      edfda10a
    • Sandrine Bailleux's avatar
      Juno: Implement initial platform port · 01b916bf
      Sandrine Bailleux authored
      This patch adds the initial port of the ARM Trusted Firmware on the Juno
      development platform. This port does not support a BL3-2 image or any PSCI APIs
      apart from PSCI_VERSION and PSCI_CPU_ON. It enables workarounds for selected
      Cortex-A57 (#806969 & #813420) errata and implements the workaround for a Juno
      platform errata (Defect id 831273).
      
      Change-Id: Ib3d92df3af53820cfbb2977582ed0d7abf6ef893
      01b916bf
  10. 14 Aug, 2014 1 commit
    • Dan Handley's avatar
      Move IO storage source to drivers directory · 935db693
      Dan Handley authored
      Move the remaining IO storage source file (io_storage.c) from the
      lib to the drivers directory. This requires that platform ports
      explicitly add this file to the list of source files.
      
      Also move the IO header files to a new sub-directory, include/io.
      
      Change-Id: I862b1252a796b3bcac0d93e50b11e7fb2ded93d6
      935db693
  11. 06 May, 2014 3 commits
    • Dan Handley's avatar
      Remove variables from .data section · 625de1d4
      Dan Handley authored
      Update code base to remove variables from the .data section,
      mainly by using const static data where possible and adding
      the const specifier as required. Most changes are to the IO
      subsystem, including the framework APIs. The FVP power
      management code is also affected.
      
      Delay initialization of the global static variable,
      next_image_type in bl31_main.c, until it is realy needed.
      Doing this moves the variable from the .data to the .bss
      section.
      
      Also review the IO interface for inconsistencies, using
      uintptr_t where possible instead of void *. Remove the
      io_handle and io_dev_handle typedefs, which were
      unnecessary, replacing instances with uintptr_t.
      
      Fixes ARM-software/tf-issues#107.
      
      Change-Id: I085a62197c82410b566e4698e5590063563ed304
      625de1d4
    • Dan Handley's avatar
      Reduce deep nesting of header files · 97043ac9
      Dan Handley authored
      Reduce the number of header files included from other header
      files as much as possible without splitting the files. Use forward
      declarations where possible. This allows removal of some unnecessary
      "#ifndef __ASSEMBLY__" statements.
      
      Also, review the .c and .S files for which header files really need
      including and reorder the #include statements alphabetically.
      
      Fixes ARM-software/tf-issues#31
      
      Change-Id: Iec92fb976334c77453e010b60bcf56f3be72bd3e
      97043ac9
    • Dan Handley's avatar
      Move include and source files to logical locations · 4ecca339
      Dan Handley authored
      Move almost all system include files to a logical sub-directory
      under ./include. The only remaining system include directories
      not under ./include are specific to the platform. Move the
      corresponding source files to match the include directory
      structure.
      
      Also remove pm.h as it is no longer used.
      
      Change-Id: Ie5ea6368ec5fad459f3e8a802ad129135527f0b3
      4ecca339
  12. 17 Feb, 2014 1 commit
    • James Morrissey's avatar
      Implement load_image in terms of IO abstraction · 9d72b4ea
      James Morrissey authored
      The modified implementation uses the IO abstraction rather than
      making direct semi-hosting calls.  The semi-hosting driver is now
      registered for the FVP platform during initialisation of each boot
      stage where it is used.  Additionally, the FVP platform includes a
      straightforward implementation of 'plat_get_image_source' which
      provides a generic means for the 'load_image' function to determine
      how to access the image data.
      
      Change-Id: Ia34457b471dbee990c7b3c79de7aee4ceea51aa6
      9d72b4ea
  13. 17 Jan, 2014 2 commits
    • Jeenu Viswambharan's avatar
      Change comments in assembler files to help ctags · 3a4cae05
      Jeenu Viswambharan authored
      Ctags seem to have a problem with generating tags for assembler symbols
      when a comment immediately follows an assembly label.
      
      This patch inserts a single space character between the label
      definition and the following comments to help ctags.
      
      The patch is generated by the command:
      
        git ls-files -- \*.S | xargs sed -i 's/^\([^:]\+\):;/\1: ;/1'
      
      Change-Id: If7a3c9d0f51207ea033cc8b8e1b34acaa0926475
      3a4cae05
    • Dan Handley's avatar
      Update year in copyright text to 2014 · e83b0cad
      Dan Handley authored
      Change-Id: Ic7fb61aabae1d515b9e6baf3dd003807ff42da60
      e83b0cad
  14. 05 Dec, 2013 1 commit
    • Dan Handley's avatar
      Enable third party contributions · ab2d31ed
      Dan Handley authored
      - Add instructions for contributing to ARM Trusted Firmware.
      
      - Update copyright text in all files to acknowledge contributors.
      
      Change-Id: I9311aac81b00c6c167d2f8c889aea403b84450e5
      ab2d31ed
  15. 25 Oct, 2013 1 commit