1. 21 Apr, 2016 3 commits
  2. 08 Feb, 2016 1 commit
    • Sandrine Bailleux's avatar
      Disable non-temporal hint on Cortex-A53/57 · 54035fc4
      Sandrine Bailleux authored
      The LDNP/STNP instructions as implemented on Cortex-A53 and
      Cortex-A57 do not behave in a way most programmers expect, and will
      most probably result in a significant speed degradation to any code
      that employs them. The ARMv8-A architecture (see Document ARM DDI
      0487A.h, section D3.4.3) allows cores to ignore the non-temporal hint
      and treat LDNP/STNP as LDP/STP instead.
      
      This patch introduces 2 new build flags:
      A53_DISABLE_NON_TEMPORAL_HINT and A57_DISABLE_NON_TEMPORAL_HINT
      to enforce this behaviour on Cortex-A53 and Cortex-A57. They are
      enabled by default.
      
      The string printed in debug builds when a specific CPU errata
      workaround is compiled in but skipped at runtime has been
      generalised, so that it can be reused for the non-temporal hint use
      case as well.
      
      Change-Id: I3e354f4797fd5d3959872a678e160322b13867a1
      54035fc4
  3. 05 Aug, 2015 1 commit
  4. 29 Oct, 2014 1 commit
    • Soby Mathew's avatar
      Optimize Cortex-A57 cluster power down sequence on Juno · 5541bb3f
      Soby Mathew authored
      This patch optimizes the Cortex-A57 cluster power down sequence by not
      flushing the Level1 data cache. The L1 data cache and the L2 unified
      cache are inclusive. A flush of the L2 by set/way flushes any dirty
      lines from the L1 as well. This is a known safe deviation from the
      Cortex-A57 TRM defined power down sequence. This optimization can be
      enabled by the platform through the 'SKIP_A57_L1_FLUSH_PWR_DWN' build
      flag. Each Cortex-A57 based platform must make its own decision on
      whether to use the optimization.
      
      This patch also renames the cpu-errata-workarounds.md to
      cpu-specific-build-macros.md as this facilitates documentation
      of both CPU Specific errata and CPU Specific Optimization
      build macros.
      
      Change-Id: I299b9fe79e9a7e08e8a0dffb7d345f9a00a71480
      5541bb3f
  5. 20 Aug, 2014 1 commit
    • Soby Mathew's avatar
      Add support for selected Cortex-A57 errata workarounds · d9bdaf2d
      Soby Mathew authored
      This patch adds workarounds for selected errata which affect the Cortex-A57 r0p0
      part. Each workaround has a build time flag which should be used by the platform
      port to enable or disable the corresponding workaround. The workarounds are
      disabled by default. An assertion is raised if the platform enables a workaround
      which does not match the CPU revision at runtime.
      
      Change-Id: I9ae96b01c6ff733d04dc733bd4e67dbf77b29fb0
      d9bdaf2d
  6. 20 Feb, 2014 1 commit
    • Jeenu Viswambharan's avatar
      Cleanup FIP build targets and messages · 2f2cef46
      Jeenu Viswambharan authored
      At present the fip.bin depends on phony targets for BL images, resulting
      in unconditional remake of fip.bin. Also the build messages doesn't
      match with the rest of build system.
      
      This patch modifies the fip.bin dependencies to the actual BL binary
      images so that fip.bin is remade only when the component images are
      rebuilt/modified. The build messages and FIP Makefile are modified to
      match the style of rest of the build system.
      
      Change-Id: I8dd08666ff766d106820a5b4b037c2161bcf140f
      2f2cef46
  7. 17 Feb, 2014 1 commit
    • Harry Liebel's avatar
      Add Firmware Image Package creation tool · f58ad36f
      Harry Liebel authored
      This tool can be used to create a Firmware Image Packages (FIP). These
      FIPs store a combined set of firmware images with a Table of Contents
      (ToC) that can be loaded by the firmware from platform storage.
      
      - Add uuid.h from FreeBSD.
      - Use symbolic links to shared headers otherwise unwanted headers and
        definitions are pulled in.
      - A FIP is created as part of the default FVP build.
      - A BL3-3 image(e.g. UEFI) must be provided.
      
      Change-Id: Ib73feee181df2dba68bf6abec115a83cfa5e26cb
      f58ad36f
  8. 20 Jan, 2014 2 commits
  9. 17 Jan, 2014 1 commit
  10. 20 Dec, 2013 1 commit
    • Harry Liebel's avatar
      Create local C library implementation (1/2) · c81b1d0f
      Harry Liebel authored
      - This change is split into two separate patches in order to
        simplify the history as interpreted by 'git'. The split is
        between the move/rename and addition of new files.
      - Remove dependency on toolchain C library headers and functions in
        order to ensure behavioural compatibility between toolchains.
      - Use FreeBSD as reference for C library implementation.
      - Do not let GCC use default library include paths.
      - Remove unused definitions in modified headers and implementations.
      - Move C library files to 'lib/stdlib' and 'include/stdlib'.
      - Break std.c functions out into separate files.
      
      Change-Id: I91cddfb3229775f770ad781589670c57d347a154
      c81b1d0f
  11. 05 Dec, 2013 1 commit
    • Dan Handley's avatar
      Enable third party contributions · ab2d31ed
      Dan Handley authored
      - Add instructions for contributing to ARM Trusted Firmware.
      
      - Update copyright text in all files to acknowledge contributors.
      
      Change-Id: I9311aac81b00c6c167d2f8c889aea403b84450e5
      ab2d31ed
  12. 25 Oct, 2013 1 commit