1. 22 Jun, 2017 1 commit
    • Dimitris Papastamos's avatar
      aarch32: Apply workaround for errata 813419 of Cortex-A57 · 6f512a3d
      Dimitris Papastamos authored
      
      
      TLBI instructions for monitor mode won't have the desired effect under
      specific circumstances in Cortex-A57 r0p0. The workaround is to
      execute DSB and TLBI twice each time.
      
      Even though this errata is only needed in r0p0, the current errata
      framework is not prepared to apply run-time workarounds. The current one
      is always applied if compiled in, regardless of the CPU or its revision.
      
      The `DSB` instruction used when initializing the translation tables has
      been changed to `DSB ISH` as an optimization and to be consistent with
      the barriers used for the workaround.
      
      NOTE: This workaround is present in AArch64 TF and already enabled by
      default on Juno.
      
      Change-Id: I10b0baa304ed64b13b7b26ea766e61461e759dfa
      Signed-off-by: default avatarDimitris Papastamos <dimitris.papastamos@arm.com>
      6f512a3d
  2. 20 Jun, 2017 1 commit
  3. 14 Jun, 2017 1 commit
  4. 18 May, 2017 1 commit
  5. 09 May, 2017 1 commit
  6. 03 May, 2017 1 commit
  7. 02 May, 2017 1 commit
    • Antonio Nino Diaz's avatar
      Fix execute-never permissions in xlat tables libs · a5640252
      Antonio Nino Diaz authored
      
      
      Translation regimes that only support one virtual address space (such as
      the ones for EL2 and EL3) can flag memory regions as execute-never by
      setting to 1 the XN bit in the Upper Attributes field in the translation
      tables descriptors. Translation regimes that support two different
      virtual address spaces (such as the one shared by EL1 and EL0) use bits
      PXN and UXN instead.
      
      The Trusted Firmware runs at EL3 and EL1, it has to handle translation
      tables of both translation regimes, but the previous code handled both
      regimes the same way, as if both had only 1 VA range.
      
      When trying to set a descriptor as execute-never it would set the XN
      bit correctly in EL3, but it would set the XN bit in EL1 as well. XN is
      at the same bit position as UXN, which means that EL0 was being
      prevented from executing code at this region, not EL1 as the code
      intended. Therefore, the PXN bit was unset to 0 all the time. The result
      is that, in AArch64 mode, read-only data sections of BL2 weren't
      protected from being executed.
      
      This patch adds support of translation regimes with two virtual address
      spaces to both versions of the translation tables library, fixing the
      execute-never permissions for translation tables in EL1.
      
      The library currently does not support initializing translation tables
      for EL0 software, therefore it does not set/unset the UXN bit. If EL1
      software needs to initialize translation tables for EL0 software, it
      should use a different library instead.
      
      Change-Id: If27588f9820ff42988851d90dc92801c8ecbe0c9
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      a5640252
  8. 29 Apr, 2017 1 commit
    • Scott Branden's avatar
      Move defines in utils.h to utils_def.h to fix shared header compile issues · 53d9c9c8
      Scott Branden authored
      
      
      utils.h is included in various header files for the defines in it.
      Some of the other header files only contain defines.  This allows the
      header files to be shared between host and target builds for shared defines.
      
      Recently types.h has been included in utils.h as well as some function
      prototypes.
      
      Because of the inclusion of types.h conflicts exist building host tools
      abd these header files now.  To solve this problem,
      move the defines to utils_def.h and have this included by utils.h and
      change header files to only include utils_def.h and not pick up the new
      types.h being introduced.
      
      Fixes ARM-software/tf-issues#461
      Signed-off-by: default avatarScott Branden <scott.branden@broadcom.com>
      
      Remove utils_def.h from utils.h
      
      This patch removes utils_def.h from utils.h as it is not required.
      And also makes a minor change to ensure Juno platform compiles.
      
      Change-Id: I10cf1fb51e44a8fa6dcec02980354eb9ecc9fa29
      53d9c9c8
  9. 20 Apr, 2017 2 commits
    • Sandrine Bailleux's avatar
      xlat lib: Use mmap_attr_t type consistently · 28fa2e9e
      Sandrine Bailleux authored
      
      
      This patch modifies both versions of the translation table library
      to use the mmap_attr_t type consistently wherever it is manipulating
      MT_* attributes variables. It used to use mmap_attr_t or plain integer
      types interchangeably, which compiles fine because an enumeration type
      can be silently converted to an integer, but which is semantically
      incorrect.
      
      This patch removes this assumption by using the abstract type
      'mmap_attr_t' all the time.
      
      Change-Id: Id1f099025d2cb962b275bb7e39ad2c4dbb4e366c
      Signed-off-by: default avatarSandrine Bailleux <sandrine.bailleux@arm.com>
      28fa2e9e
    • Antonio Nino Diaz's avatar
      Control inclusion of helper code used for asserts · aa61368e
      Antonio Nino Diaz authored
      
      
      Many asserts depend on code that is conditionally compiled based on the
      DEBUG define. This patch modifies the conditional inclusion of such code
      so that it is based on the ENABLE_ASSERTIONS build option.
      
      Change-Id: I6406674788aa7e1ad7c23d86ce94482ad3c382bd
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      aa61368e
  10. 28 Mar, 2017 1 commit
  11. 08 Mar, 2017 4 commits
    • Antonio Nino Diaz's avatar
      Apply workaround for errata 813419 of Cortex-A57 · ccbec91c
      Antonio Nino Diaz authored
      
      
      TLBI instructions for EL3 won't have the desired effect under specific
      circumstances in Cortex-A57 r0p0. The workaround is to execute DSB and
      TLBI twice each time.
      
      Even though this errata is only needed in r0p0, the current errata
      framework is not prepared to apply run-time workarounds. The current one
      is always applied if compiled in, regardless of the CPU or its revision.
      
      This errata has been enabled for Juno.
      
      The `DSB` instruction used when initializing the translation tables has
      been changed to `DSB ISH` as an optimization and to be consistent with
      the barriers used for the workaround.
      
      Change-Id: Ifc1d70b79cb5e0d87e90d88d376a59385667d338
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      ccbec91c
    • Antonio Nino Diaz's avatar
      Add dynamic region support to xlat tables lib v2 · 0b64f4ef
      Antonio Nino Diaz authored
      
      
      Added APIs to add and remove regions to the translation tables
      dynamically while the MMU is enabled. Only static regions are allowed
      to overlap other static ones (for backwards compatibility).
      
      A new private attribute (MT_DYNAMIC / MT_STATIC) has been added to
      flag each region as such.
      
      The dynamic mapping functionality can be enabled or disabled when
      compiling by setting the build option PLAT_XLAT_TABLES_DYNAMIC to 1
      or 0. This can be done per-image.
      
      TLB maintenance code during dynamic table mapping and unmapping has
      also been added.
      
      Fixes ARM-software/tf-issues#310
      
      Change-Id: I19e8992005c4292297a382824394490c5387aa3b
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      0b64f4ef
    • Antonio Nino Diaz's avatar
      Improve debug output of the translation tables · f10644c5
      Antonio Nino Diaz authored
      
      
      The printed output has been improved in two ways:
      
      - Whenever multiple invalid descriptors are found, only the first one
        is printed, and a line is added to inform about how many descriptors
        have been omitted.
      
      - At the beginning of each line there is an indication of the table
        level the entry belongs to. Example of the new output:
        `[LV3] VA:0x1000 PA:0x1000 size:0x1000 MEM-RO-S-EXEC`
      
      Change-Id: Ib6f1cd8dbd449452f09258f4108241eb11f8d445
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      f10644c5
    • Antonio Nino Diaz's avatar
      Add version 2 of xlat tables library · 7bb01fb2
      Antonio Nino Diaz authored
      
      
      The folder lib/xlat_tables_v2 has been created to store a new version
      of the translation tables library for further modifications in patches
      to follow. At the moment it only contains a basic implementation that
      supports static regions.
      
      This library allows different translation tables to be modified by
      using different 'contexts'. For now, the implementation defaults to
      the translation tables used by the current image, but it is possible
      to modify other tables than the ones in use.
      
      Added a new API to print debug information for the current state of
      the translation tables, rather than printing the information while
      the tables are being created. This allows subsequent debug printing
      of the xlat tables after they have been changed, which will be useful
      when dynamic regions are implemented in a patch to follow.
      
      The common definitions stored in `xlat_tables.h` header have been moved
      to a new file common to both versions, `xlat_tables_defs.h`.
      
      All headers related to the translation tables library have been moved to
      a the subfolder `xlat_tables`.
      
      Change-Id: Ia55962c33e0b781831d43a548e505206dffc5ea9
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      7bb01fb2