- 26 Jun, 2019 1 commit
-
-
Manoj Kumar authored
N1SDP platform supports RDIMMs with ECC capability. To use the ECC capability, the entire DDR memory space has to be zeroed out before enabling the ECC bits in DMC620. Zeroing out several gigabytes of memory from SCP is quite time consuming so functions are added that zeros out the DDR memory from application processor which is much faster compared to SCP. BL33 binary cannot be copied to DDR memory before enabling ECC so this is also done by TF-A from IOFPGA-DDR3 memory to main DDR4 memory after ECC is enabled. Original PLAT_PHY_ADDR_SPACE_SIZE was limited to 36-bits with which the entire DDR space cannot be accessed as DRAM2 starts in base 0x8080000000. So these macros are redefined for all ARM platforms. Change-Id: If09524fb65b421b7a368b1b9fc52c49f2ddb7846 Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com>
-
- 17 Apr, 2019 1 commit
-
-
Aditya Angadi authored
The BL1 stage setup code for ARM platforms sets up the SP805 watchdog controller as the secure watchdog. But not all ARM platforms use SP805 as the secure watchdog controller. So introduce two new ARM platform code specific wrapper functions to start and stop the secure watchdog. These functions then replace the calls to SP805 driver in common BL1 setup code. All the ARM platforms implement these wrapper functions by either calling into SP805 driver or the SBSA watchdog driver. Change-Id: I1a9a11b124cf3fac2a84f22ca40acd440a441257 Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>
-
- 19 Feb, 2019 1 commit
-
-
John Tsichritzis authored
Change-Id: Ideb49011da35f39ff1959be6f5015fa212ca2b6b Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
-
- 07 Jan, 2019 1 commit
-
-
Deepak Pandey authored
This patch removes the dependency of the N1SDP on soc css defines in order to let the N1SDP platform port define the uart related constants. Change-Id: If13796f278586a01512ee99615502b30e478189e Signed-off-by: Deepak Pandey <Deepak.Pandey@arm.com>
-
- 29 Oct, 2018 1 commit
-
-
Deepak Pandey authored
This patch adds support for the N1SDP (NeoVerse N1 System Development Platform). It is an initial port and additional features are expected to be added later. The port includes only BL31 support as the System Control Processor (SCP) is expected to take the role of primary boatloader Change-Id: Ife17d8215a7bfcc1420204a72205e7ef920d0c10 Signed-off-by: Deepak Pandey <Deepak.Pandey@arm.com>
-