1. 12 May, 2017 1 commit
    • Soby Mathew's avatar
      AArch32: Rework SMC context save and restore mechanism · b6285d64
      Soby Mathew authored
      
      
      The current SMC context data structure `smc_ctx_t` and related helpers are
      optimized for case when SMC call does not result in world switch. This was
      the case for SP_MIN and BL1 cold boot flow. But the firmware update usecase
      requires world switch as a result of SMC and the current SMC context helpers
      were not helping very much in this regard. Therefore this patch does the
      following changes to improve this:
      
      1. Add monitor stack pointer, `spmon` to `smc_ctx_t`
      
      The C Runtime stack pointer in monitor mode, `sp_mon` is added to the
      SMC context, and the `smc_ctx_t` pointer is cached in `sp_mon` prior
      to exit from Monitor mode. This makes is easier to retrieve the
      context when the next SMC call happens. As a result of this change,
      the SMC context helpers no longer depend on the stack to save and
      restore the register.
      
      This aligns it with the context save and restore mechanism in AArch64.
      
      2. Add SCR in `smc_ctx_t`
      
      Adding the SCR register to `smc_ctx_t` makes it easier to manage this
      register state when switching between non secure and secure world as a
      result of an SMC call.
      
      Change-Id: I5e12a7056107c1701b457b8f7363fdbf892230bf
      Signed-off-by: default avatarSoby Mathew <soby.mathew@arm.com>
      Signed-off-by: default avatardp-arm <dimitris.papastamos@arm.com>
      b6285d64
  2. 03 May, 2017 1 commit
  3. 12 Dec, 2016 1 commit
    • Soby Mathew's avatar
      AArch32: Fix the stack alignment issue · 9f3ee61c
      Soby Mathew authored
      
      
      The AArch32 Procedure call Standard mandates that the stack must be aligned
      to 8 byte boundary at external interfaces. This patch does the required
      changes.
      
      This problem was detected when a crash was encountered in
      `psci_print_power_domain_map()` while printing 64 bit values. Aligning
      the stack to 8 byte boundary resolved the problem.
      
      Fixes ARM-Software/tf-issues#437
      
      Change-Id: I517bd8203601bb88e9311bd36d477fb7b3efb292
      Signed-off-by: default avatarSoby Mathew <soby.mathew@arm.com>
      9f3ee61c
  4. 01 Dec, 2016 1 commit
    • Yatharth Kochar's avatar
      AArch32: Miscellaneous fixes in the AArch32 code · 69d59e0c
      Yatharth Kochar authored
      
      
      This patch makes following miscellaneous fixes:
      * pl011_console.S: Fixed the bit mask used to check if the
        transmit FIFO is full or empty.
      * smcc_macros.S: Added `_fsxc` suffix while updating the SPSR.
        By default the assembler assumes `_fc` suffix which does not
        update all the fields in SPSR. By adding `_fsxc` suffix all
        the fields gets updated.
      * platform_helpers.S: Removed the weak definition for
        `plat_my_core_pos()` as this is a mandatory function which
        needs to be defined by all platforms.
      
      Change-Id: I8302292533c943686fff8d7c749a07132c052a3b
      Signed-off-by: default avatarYatharth Kochar <yatharth.kochar@arm.com>
      69d59e0c
  5. 10 Aug, 2016 1 commit
    • Soby Mathew's avatar
      AArch32: Add SMCC context · 3e3616ab
      Soby Mathew authored
      This patch defines a SMCC context to save and restore
      registers during a SMC call. It also adds appropriate helpers
      to save and restore from this context for use by AArch32
      secure payload and BL stages.
      
      Change-Id: I64c8d6fe1d6cac22e1f1f39ea1b54ee1b1b72248
      3e3616ab