- 03 Jul, 2018 1 commit
-
-
Andre Przywara authored
The H6 is Allwinner's most recent SoC. It shares most peripherals with the other ARMv8 Allwinner SoCs (A64/H5), but has a completely different memory map. Introduce a separate platform target, which includes a different header file to cater for the address differences. Also add the new build target to the documentation. The new ATF platform name is "sun50i_h6". Signed-off-by: Andre Przywara <andre.przywara@arm.com>
-
- 15 Jun, 2018 3 commits
-
-
Andre Przywara authored
Some peripherals are TrustZone aware, so they need to be configured to be accessible from non-secure world, as we don't need any of them being exclusive to the secure world. This affects some clocks, DMA channels and the Secure Peripheral Controller (SPC). The latter controls access to most devices, but is not active unless booting with the secure boot fuse burnt. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
-
Samuel Holland authored
sun50i_cpu_on will be used by the PSCI implementation to initialize secondary cores for SMP. Unfortunately, sun50i_cpu_off is not usable by PSCI directly, because it is not possible for a CPU to use this function to power itself down. Power cannot be shut off until the outputs are clamped, and MMIO does not work once the outputs are clamped. But at least CPU0 can shutdown the other cores early in the BL31 boot process and before shutting down the system. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
-
Samuel Holland authored
The Allwinner A64 SoC is quite popular on single board computers. It comes with four Cortex-A53 cores in a singe cluster and the usual peripherals for set-top box/tablet SoC. The ATF platform target is called "sun50i_a64". [Andre: adapted to amended directory layout, removed unneeded definitions ] Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
-