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  1. 22 Jun, 2021 2 commits
  3. 04 Jun, 2021 3 commits
  5. 03 Jun, 2021 3 commits
  7. 27 May, 2021 2 commits
  9. 29 Apr, 2021 1 commit
  11. 21 Apr, 2021 2 commits
  13. 08 Apr, 2021 1 commit
  15. 23 Mar, 2021 2 commits
  17. 22 Jan, 2021 1 commit
  19. 20 Jan, 2021 1 commit
  21. 13 Oct, 2020 6 commits
  23. 09 Oct, 2020 7 commits
  25. 24 Sep, 2020 1 commit
    • Yann Gautier's avatar
      fdts: stm32mp1: realign device tree with kernel · 277d6af5
      Yann Gautier authored 
      

There is one dtsi file per SoC version:
- STM32MP151: common part for all version, Single Cortex-A7
- STM32MP153: Dual Cortex-A7
- STM32MP157: + GPU and DSI, but not needed for TF-A

The STM32MP15xC include a cryptography peripheral, add it in a dedicated
file.

There are 4 packages available, for which  the IOs number change. Have one
file for each package. The 2 packages AB and AD are added.

STM32157A-DK1 and STM32MP157C-DK2 share most of their features, a common
dkx file is then created.

Some reordering is done in other files, and realign with kernel DT files.

The DDR files are generated with our internal tool, no changes in the
registers values.

Change-Id: I9f2ef00306310abe34b94c2f10fc7a77a10493d1
Signed-off-by: default avatarYann Gautier <yann.gautier@st.com>
      277d6af5
  27. 21 Sep, 2020 3 commits
  29. 14 Sep, 2020 1 commit
  31. 14 Aug, 2020 1 commit
  33. 16 Jul, 2020 1 commit
    • Etienne Carriere's avatar
      stm32mp1: SCMI clock and reset service in SP_MIN · fdaaaeb4
      Etienne Carriere authored 
      

This change implements platform services for stm32mp1 to expose clock
and reset controllers over SCMI clock and reset domain protocols
in sp_min firmware.

Requests execution use a fastcall SMC context using a SiP function ID.
The setup allows the create SCMI channels by assigning a specific
SiP SMC function ID for each channel/agent identifier defined. In this
change, stm32mp1 exposes a single channel and hence expects single
agent at a time.

The input payload in copied in secure memory before the message
in passed through the SCMI server drivers. BL32/sp_min is invoked
for a single SCMI message processing and always returns with a
synchronous response message passed back to the caller agent.

This change fixes and updates STM32_COMMON_SIP_NUM_CALLS that was
previously wrongly set 4 whereas only 1 SiP SMC function ID was to
be counted. STM32_COMMON_SIP_NUM_CALLS is now set to 3 since the
2 added SiP SMC function IDs for SCMI services.

Change-Id: Icb428775856b9aec00538172aea4cf11e609b033
Signed-off-by: default avatarEtienne Carriere <etienne.carriere@st.com>
      fdaaaeb4
  35. 08 Jul, 2020 2 commits
    • Etienne Carriere's avatar
      stm32mp1: register shared resource per GPIO bank/pin · ec8f4212
      Etienne Carriere authored 
      

Introduce helper functions stm32mp_register_secure_gpio() and
stm32mp_register_non_secure_gpio() for drivers to register a
GPIO pin as secure or non-secure.

These functions are stubbed when shared resource driver is not
embedded in the BL image so that drivers do not bother whether they
shall register or not their resources.

Change-Id: I1fe98576c072ae31f75427c9ac5c9f6c4f1b6ed1
Signed-off-by: default avatarEtienne Carriere <etienne.carriere@st.com>
      ec8f4212
    • Etienne Carriere's avatar
      stm32mp1: register shared resource per IOMEM address · 0651b5b7
      Etienne Carriere authored 
      

Introduce helper functions stm32mp_register_secure_periph_iomem()
and stm32mp_register_non_secure_periph_iomem() for drivers to
register a resource as secure or non-secure based on its SoC
interface registers base address.

These functions are stubbed when shared resources driver is not
embedded (!STM32MP_SHARED_RESOURCES) so that drivers embedded
in other BL stages do not bother whether they shall register or
not their resources.

Change-Id: Icebd05a930afc5964bc4677357da5d1b23666066
Signed-off-by: default avatarEtienne Carriere <etienne.carriere@st.com>
      0651b5b7