- 28 Sep, 2018 1 commit
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Antonio Nino Diaz authored
- Migrate to new GIC interfaces. - Remove unused bl1_init_bl2_mem_layout(). - Migrate to bl31_early_platform_setup2(). - Use PLAT_VIRT_ADDR_SPACE_SIZE and PLAT_PHY_ADDR_SPACE_SIZE. - Update Makefile paths. - Remove references to removed build options. Change-Id: Idd1e99b4864b2a72e9e12ff1fcd73d8285bc1c94 Tested-by: Haojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 10 Aug, 2018 1 commit
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Haojian Zhuang authored
Migrate to mmc framework. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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- 27 Apr, 2018 1 commit
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Masahiro Yamada authored
Since commit 031dbb12 ("AArch32: Add essential Arch helpers"), it is difficult to use consistent format strings for printf() family between aarch32 and aarch64. For example, uint64_t is defined as 'unsigned long long' for aarch32 and as 'unsigned long' for aarch64. Likewise, uintptr_t is defined as 'unsigned int' for aarch32, and as 'unsigned long' for aarch64. A problem typically arises when you use printf() in common code. One solution could be, to cast the arguments to a type long enough for both architectures. For example, if 'val' is uint64_t type, like this: printf("val = %llx\n", (unsigned long long)val); Or, somebody may suggest to use a macro provided by <inttypes.h>, like this: printf("val = %" PRIx64 "\n", val); But, both would make the code ugly. The solution adopted in Linux kernel is to use the same typedefs for all architectures. The fixed integer types in the kernel-space have been unified into int-ll64, like follows: typedef signed char int8_t; typedef unsigned char uint8_t; typedef signed short int16_t; typedef unsigned short uint16_t; typedef signed int int32_t; typedef unsigned int uint32_t; typedef signed long long int64_t; typedef unsigned long long uint64_t; [ Linux commit: 0c79a8e29b5fcbcbfd611daf9d500cfad8370fcf ] This gets along with the codebase shared between 32 bit and 64 bit, with the data model called ILP32, LP64, respectively. The width for primitive types is defined as follows: ILP32 LP64 int 32 32 long 32 64 long long 64 64 pointer 32 64 'long long' is 64 bit for both, so it is used for defining uint64_t. 'long' has the same width as pointer, so for uintptr_t. We still need an ifdef conditional for (s)size_t. All 64 bit architectures use "unsigned long" size_t, and most 32 bit architectures use "unsigned int" size_t. H8/300, S/390 are known as exceptions; they use "unsigned long" size_t despite their architecture is 32 bit. One idea for simplification might be to define size_t as 'unsigned long' across architectures, then forbid the use of "%z" string format. However, this would cause a distortion between size_t and sizeof() operator. We have unknowledge about the native type of sizeof(), so we need a guess of it anyway. I want the following formula to always return 1: __builtin_types_compatible_p(size_t, typeof(sizeof(int))) Fortunately, ARM is probably a majority case. As far as I know, all 32 bit ARM compilers use "unsigned int" size_t. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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- 27 Mar, 2018 1 commit
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Joel Hutton authored
Void pointers have been used to access linker symbols, by declaring an extern pointer, then taking the address of it. This limits symbols values to aligned pointer values. To remove this restriction an IMPORT_SYM macro has been introduced, which declares it as a char pointer and casts it to the required type. Change-Id: I89877fc3b13ed311817bb8ba79d4872b89bfd3b0 Signed-off-by: Joel Hutton <Joel.Hutton@Arm.com>
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- 12 Mar, 2018 1 commit
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Michael Brandl authored
Boot memory layout is specific for a platform, but should not be mixed up with other platform specific attributes. A separate file is much cleaner and better to compare with other platforms. Take a look at plat/poplar where it is done the same way. Moved hikey_def.h to system include folder and moved includes from hikey_def.h to more general platform_def.h. Signed-off-by: Michael Brandl <git@fineon.pw>
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- 06 Mar, 2018 1 commit
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Haojian Zhuang authored
plat/hisilicon/hikey/hikey_bl1_setup.c:565:47: error: value size does not match register size specified by the constraint and modifier [-Werror,-Wasm-operand-widths] __asm__ volatile ("mrs %0, cpacr_el1" : "=r"(data)); Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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- 05 Mar, 2018 3 commits
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Haojian Zhuang authored
Create hikey_bl_common.c to store duplicated initialization code in BL1 and BL2. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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Haojian Zhuang authored
Since non-TF ROM is used in HiKey platform (Hisilicon Hi6220 SoC), replace BL1 by BL2_EL3 in normal boot mode. When we recovery images in recovery mode, keep to use BL1. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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Haojian Zhuang authored
Since LOAD_IMAGE_V2 is always enabled in HiKey platform. Drop LOAD_IMAGE v1 to simplify code. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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- 18 Oct, 2017 1 commit
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Haojian Zhuang authored
Make RTC out of reset mode since it may be used in UEFI. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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- 01 Sep, 2017 1 commit
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Victor Chong authored
Signed-off-by: Victor Chong <victor.chong@linaro.org> Signed-off-by: Leo Yan <leo.yan@linaro.org>
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- 26 Jul, 2017 1 commit
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Leo Yan authored
After disconnect Jumper pin 1-2 in J15 header, the signal VBUS_DET is to be pulled down to low level. This will assert the interrupt signal in PMIC and trigger IRQ in GIC; the asserted signal from VBUS_DET is level triggered and kernel reports the warning for unhooked interrupt handling; and VBUS_DET stays with low level, this triggers IRQ storm in kernel. This patch is to disable interrupt for VBUS_DET in PMIC, this can dismiss the verbose log and IRQ storm after kernel booting. [ 40.835279] irq 57: nobody cared (try booting with the "irqpoll" option) [ 40.842075] CPU: 0 PID: 980 Comm: irq/57-hi655x-p Not tainted 4.4.77-568944-g576a0114dec8-dirty #667 [ 40.851303] Hardware name: HiKey Development Board (DT) [ 40.856580] Call trace: [ 40.859060] [<ffffff800808c4cc>] dump_backtrace+0x0/0x1e0 [ 40.864516] [<ffffff800808c8ac>] show_stack+0x20/0x28 [ 40.869622] [<ffffff80084b9688>] dump_stack+0xa8/0xe0 [ 40.874729] [<ffffff800812dd5c>] __report_bad_irq+0x40/0xec [ 40.880360] [<ffffff800812e0bc>] note_interrupt+0x1e4/0x2d8 [ 40.885992] [<ffffff800812b11c>] handle_irq_event_percpu+0xd8/0x268 [ 40.892324] [<ffffff800812b2f8>] handle_irq_event+0x4c/0x7c [ 40.897955] [<ffffff800812ecbc>] handle_level_irq+0xcc/0x178 [ 40.903672] [<ffffff800812a778>] generic_handle_irq+0x34/0x4c [ 40.909481] [<ffffff80085074c8>] pl061_irq_handler+0xa8/0x124 [ 40.915286] [<ffffff800812a778>] generic_handle_irq+0x34/0x4c [ 40.921092] [<ffffff800812a820>] __handle_domain_irq+0x90/0xf8 [ 40.926985] [<ffffff8008082620>] gic_handle_irq+0x58/0xa8 Signed-off-by: Dmitry Shmidt <dimitrysh@google.com> Signed-off-by: Leo Yan <leo.yan@linaro.org>
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- 24 May, 2017 1 commit
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Haojian Zhuang authored
Initialize regulators, pins and eMMC in BL1. Only SRAM could be used in BL1. So BL2 will be loaded from eMMC into SRAM later. Change-Id: I8e7ef82ffa29a3c647c9d2d2981e8759ee85d833 Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by: Dan Handley <dan.handley@arm.com>
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