1. 08 Nov, 2018 1 commit
    • Antonio Nino Diaz's avatar
      Standardise header guards across codebase · c3cf06f1
      Antonio Nino Diaz authored
      
      
      All identifiers, regardless of use, that start with two underscores are
      reserved. This means they can't be used in header guards.
      
      The style that this project is now to use the full name of the file in
      capital letters followed by 'H'. For example, for a file called
      "uart_example.h", the header guard is UART_EXAMPLE_H.
      
      The exceptions are files that are imported from other projects:
      
      - CryptoCell driver
      - dt-bindings folders
      - zlib headers
      
      Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      c3cf06f1
  2. 25 Oct, 2018 1 commit
  3. 28 Sep, 2018 1 commit
    • Antonio Nino Diaz's avatar
      rockchip: Migrate to new interfaces · 2d6f1f01
      Antonio Nino Diaz authored
      
      
      - Migrate to new GIC interfaces.
      - Migrate to bl31_early_platform_setup2().
      - Use bl31_warm_entrypoint() instead of psci_entrypoint().
      - Use PLAT_VIRT_ADDR_SPACE_SIZE and PLAT_PHY_ADDR_SPACE_SIZE.
      - Update Makefile paths.
      - Remove references to removed build options.
      - Use private definition of bl31_params_t.
      
      Change-Id: I860341594b5c868b2fcaa59d23957ee718472ef1
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      2d6f1f01
  4. 20 Jul, 2018 1 commit
  5. 27 Apr, 2018 1 commit
  6. 26 Mar, 2018 1 commit
  7. 27 Feb, 2018 1 commit
  8. 29 Jan, 2018 1 commit
  9. 19 Jan, 2018 2 commits
    • Julius Werner's avatar
      rockchip: Move to MULTI_CONSOLE_API · 890abc33
      Julius Werner authored
      
      
      This patch changes all Rockchip platforms to use the new
      MULTI_CONSOLE_API. The platform-specific plat_crash_console
      implementations are removed so that the platform can use the ones from
      the common platform code instead.
      
      Also change the registers used in plat_crash_print_regs. The existing
      use of x16 and x17 has always been illegal, since those registers are
      reserved for use by the linker as a temporary scratch registers in
      intra-procedure-call veneers and can never be expected to maintain their
      values across a function call.
      
      Change-Id: I8249424150be8d5543ed4af93b56756795a5288f
      Signed-off-by: default avatarJulius Werner <jwerner@chromium.org>
      890abc33
    • Julius Werner's avatar
      rockchip: Use coreboot-supplied serial console on coreboot systems · 3c250b9a
      Julius Werner authored
      
      
      This patch changes all Rockchip platforms to initialize the serial
      console with information supplied by coreboot rather than hardcoded
      base address and divisor values if BL31 is run on top of coreboot.
      Moving the BL2-to-BL31 parameter parsing as early as possible to ensure
      that the console is available for all following code.
      
      Also update the Rockchip platform to use MULTI_CONSOLE_API.
      
      Change-Id: I670d350fa2f8b8133539f91ac14977ab47db60d9
      Signed-off-by: default avatarJulius Werner <jwerner@chromium.org>
      3c250b9a
  10. 30 Nov, 2017 1 commit
    • David Cunado's avatar
      Do not enable SVE on pre-v8.2 platforms · 3872fc2d
      David Cunado authored
      
      
      Pre-v8.2 platforms such as the Juno platform does not have
      the Scalable Vector Extensions implemented and so the build
      option ENABLE_SVE is set to zero.
      
      This has a minor performance improvement with no functional
      impact.
      
      Change-Id: Ib072735db7a0247406f8b60e325b7e28b1e04ad1
      Signed-off-by: default avatarDavid Cunado <david.cunado@arm.com>
      3872fc2d
  11. 14 Jul, 2017 1 commit
  12. 08 Jun, 2017 3 commits
  13. 03 May, 2017 1 commit
  14. 20 Mar, 2017 1 commit
  15. 03 Mar, 2017 1 commit
  16. 23 Jan, 2017 1 commit
    • Masahiro Yamada's avatar
      Use #ifdef for IMAGE_BL* instead of #if · 3d8256b2
      Masahiro Yamada authored
      
      
      One nasty part of ATF is some of boolean macros are always defined
      as 1 or 0, and the rest of them are only defined under certain
      conditions.
      
      For the former group, "#if FOO" or "#if !FOO" must be used because
      "#ifdef FOO" is always true.  (Options passed by $(call add_define,)
      are the cases.)
      
      For the latter, "#ifdef FOO" or "#ifndef FOO" should be used because
      checking the value of an undefined macro is strange.
      
      Here, IMAGE_BL* is handled by make_helpers/build_macro.mk like
      follows:
      
        $(eval IMAGE := IMAGE_BL$(call uppercase,$(3)))
      
        $(OBJ): $(2)
                @echo "  CC      $$<"
                $$(Q)$$(CC) $$(TF_CFLAGS) $$(CFLAGS) -D$(IMAGE) -c $$< -o $$@
      
      This means, IMAGE_BL* is defined when building the corresponding
      image, but *undefined* for the other images.
      
      So, IMAGE_BL* belongs to the latter group where we should use #ifdef
      or #ifndef.
      Signed-off-by: default avatarMasahiro Yamada <yamada.masahiro@socionext.com>
      3d8256b2
  17. 14 Dec, 2016 1 commit
  18. 09 Aug, 2016 1 commit
  19. 19 Jul, 2016 1 commit
    • Soby Mathew's avatar
      Include `plat_psci_common.c` from the new location · bb2162f1
      Soby Mathew authored
      The `plat_psci_common.c` was moved to the new location `plat/common`
      and a stub file was retained at previous location for compatibility. This
      patch modifies the platform makefiles to include the file from the new
      location.
      
      Change-Id: Iabddeeb824e9a5d72d176d7c644735966c8c0699
      bb2162f1
  20. 18 Jul, 2016 2 commits
    • Tony Xie's avatar
      rockchip: support the suspend/resume for rk3399 · 9ec78bdf
      Tony Xie authored
      1.Fixes the suspend/resume some bugs.
      2.Add the power domain for saving power consumption.
      3.Add cpu clusters suspend for rk3399 SoCs
      
      Change-Id: Id602779016b41d6281f4ba40a20229d909b28e46
      9ec78bdf
    • Caesar Wang's avatar
      rockchip: support plat SIP runtime service · 1760db68
      Caesar Wang authored
      Software executing in the normal world and in the trusted world at
      exception levels lower than EL3 will request runtime services using the
      SMC instruction.
      
      See the documentation here:
      https://github.com/ARM-software/arm-trusted-firmware/blob/master/docs/
      rt-svc-writers-guide.md
      
      This to be implemented as an EL3 Runtime Service in rockchip BL31
      platform port, using the "SiP Service Call" range as specified in the
      SMC Calling Convention.
      This doesn't support any SMC yet, we will support it in later.
      
      Change-Id: I0a638dd0b653c28b08f79d89f77ed7c69864017d
      1760db68
  21. 27 May, 2016 1 commit
    • Caesar Wang's avatar
      rockchip: add reset or power off gpio configuration for rk3399 · 68ff45f4
      Caesar Wang authored
      We add plat parameter structs to support BL2 to pass variable-length,
      variable-type parameters to BL31. The parameters are structured as a
      link list. During bl31 setup time, we travse the list to process each
      parameter. throuth this way, we can get the reset or power off gpio
      parameter, and do hardware control in BL31. This structure also can
      pass other parameter to BL31 in future.
      68ff45f4
  22. 20 May, 2016 1 commit
  23. 05 May, 2016 1 commit
  24. 04 May, 2016 1 commit
  25. 25 Apr, 2016 1 commit
    • Caesar Wang's avatar
      rockchip: fixes for the required · 0c05748b
      Caesar Wang authored
      
      
      This patch has the following change for rk3399.
      
      * Set the uart to 115200 since the loader decide to set
        uart baud to 115200Hz. So the ATF also should set uart baud to 115200.
      
      * We need ensure the bl31 base is greater than 4KB since there are have
        the shared mem for coreboot.(Note: the previous vesion was tested with uboot)
      
      Otherwise, we will happen the exception crash since the ddr area won't
      to work from the shared ram address in some cases.
      
      For example, the exception crash:
      CBFS: Found @ offset 19c80 size 24074
      exception _sync_sp_el0
      ELR = 0x0000000000008000
      ESR = 0x0000000002000000
      SPSR = 0x600003cc
      FAR = 0xffffffff00000000
      SP = 0x00000000ff8ed230
      ...
      X29 = 0x00000000ff8c1fc0
      X30 = 0x000000000030e3b0
      exception death
      
      Change-Id: I8bc557c6bcaf6804d2a313b38667d3e2517881d7
      Signed-off-by: default avatarCaesar Wang <wxt@rock-chips.com>
      0c05748b
  26. 13 Apr, 2016 1 commit
    • Soby Mathew's avatar
      Migrate platform ports to the new xlat_tables library · 3e4b8fdc
      Soby Mathew authored
      This patch modifies the upstream platform port makefiles to use the new
      xlat_tables library files. This patch also makes mmap region setup common
      between AArch64 and AArch32 for FVP platform port. The file `fvp_common.c`
      is moved from the `plat/arm/board/fvp/aarch64` folder to the parent folder
      as it is not specific to AArch64.
      
      Change-Id: Id2e9aac45e46227b6f83cccfd1e915404018ea0b
      3e4b8fdc
  27. 12 Apr, 2016 1 commit
    • Soby Mathew's avatar
      Fix build error in Rockchip platform · 000bc457
      Soby Mathew authored
      This patch fixes the compilation error in Rockchip rk3368 platform port when
      it is built in release mode.
      
      Fixes ARM-software/tf-issues#389
      
      Change-Id: I1a3508ac3a620289cf700e79db8f08569331ac53
      000bc457
  28. 05 Apr, 2016 1 commit
    • Tony Xie's avatar
      Support for Rockchip's family SoCs · 6fba6e04
      Tony Xie authored
      
      
      This patch adds to support the RK3368 and RK3399 SoCs.
      
      RK3368/RK3399 is one of the Rockchip family SoCs, which is an
      multi-cores ARM SoCs.
      
      This patch adds support to boot the Trusted Firmware on RK3368/RK3399
      SoCs, and adds support to boot secondary CPUs, enter/exit core
      power states for all CPUs in the slow/fast clusters.
      
      This is the initial version for rockchip SoCs.(RK3368/RK3399 and next SoCs)
      * Support arm gicv2 & gicv3.
      * Boot up multi-cores CPU.
      * Add generic CPU helper functions.
      * Support suspend/resume.
      * Add system_off & system_reset implementation.
      * Add delay timer platform implementation.
      * Support the new porting interface for the PSCI implementation.
      
      Change-Id: I704bb3532d65e8c70dbd99b512c5e6e440ea6f43
      Signed-off-by: default avatarTony Xie <tony.xie@rock-chips.com>
      Signed-off-by: default avatarCaesar Wang <wxt@rock-chips.com>
      Signed-off-by: default avatarShengfei xu <xsf@rock-chips.com>
      6fba6e04