- 08 Nov, 2018 1 commit
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Antonio Nino Diaz authored
All identifiers, regardless of use, that start with two underscores are reserved. This means they can't be used in header guards. The style that this project is now to use the full name of the file in capital letters followed by 'H'. For example, for a file called "uart_example.h", the header guard is UART_EXAMPLE_H. The exceptions are files that are imported from other projects: - CryptoCell driver - dt-bindings folders - zlib headers Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 25 Oct, 2018 1 commit
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Antonio Nino Diaz authored
This platform depends on weak functions defined in ``plat/common/aarch64/platform_helpers.S`` that are going to be removed. Change-Id: I5104d091c32271d77ed9690e9dc257c061289def Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 28 Sep, 2018 1 commit
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Antonio Nino Diaz authored
- Migrate to new GIC interfaces. - Migrate to bl31_early_platform_setup2(). - Use bl31_warm_entrypoint() instead of psci_entrypoint(). - Use PLAT_VIRT_ADDR_SPACE_SIZE and PLAT_PHY_ADDR_SPACE_SIZE. - Update Makefile paths. - Remove references to removed build options. - Use private definition of bl31_params_t. Change-Id: I860341594b5c868b2fcaa59d23957ee718472ef1 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 20 Jul, 2018 1 commit
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Antonio Nino Diaz authored
Also change header guards to fix defects of MISRA C-2012 Rule 21.1. Change-Id: Ied0d4b0e557ef6119ab669d106d2ac5d99620c57 Acked-by: Sumit Garg <sumit.garg@linaro.org> Acked-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 27 Apr, 2018 1 commit
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Masahiro Yamada authored
Commit 4c0d0390 ("Rework type usage in Trusted Firmware") changed the type usage in struct declarations, but did not touch the definition side. Fix the type mismatch. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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- 26 Mar, 2018 1 commit
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Jonathan Wright authored
Ensure (where possible) that switch statements in plat comply with MISRA rules 16.1 - 16.7. Change-Id: Ie4a7d2fd10f6141c0cfb89317ea28a755391622f Signed-off-by: Jonathan Wright <jonathan.wright@arm.com>
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- 27 Feb, 2018 1 commit
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David Cunado authored
MISRA C-2012 Rule 7.3 violation: lowercase l shall not be used as literal suffixes. This patch resolves this for the ULL() macro by using ULL suffix instead of the ull suffix. Change-Id: Ia8183c399e74677e676956e8653e82375d0e0a01 Signed-off-by: David Cunado <david.cunado@arm.com>
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- 29 Jan, 2018 1 commit
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Dimitris Papastamos authored
Change-Id: Ib67b841ab621ca1ace3280e44cf3e1d83052cb73 Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>
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- 19 Jan, 2018 2 commits
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Julius Werner authored
This patch changes all Rockchip platforms to use the new MULTI_CONSOLE_API. The platform-specific plat_crash_console implementations are removed so that the platform can use the ones from the common platform code instead. Also change the registers used in plat_crash_print_regs. The existing use of x16 and x17 has always been illegal, since those registers are reserved for use by the linker as a temporary scratch registers in intra-procedure-call veneers and can never be expected to maintain their values across a function call. Change-Id: I8249424150be8d5543ed4af93b56756795a5288f Signed-off-by: Julius Werner <jwerner@chromium.org>
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Julius Werner authored
This patch changes all Rockchip platforms to initialize the serial console with information supplied by coreboot rather than hardcoded base address and divisor values if BL31 is run on top of coreboot. Moving the BL2-to-BL31 parameter parsing as early as possible to ensure that the console is available for all following code. Also update the Rockchip platform to use MULTI_CONSOLE_API. Change-Id: I670d350fa2f8b8133539f91ac14977ab47db60d9 Signed-off-by: Julius Werner <jwerner@chromium.org>
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- 30 Nov, 2017 1 commit
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David Cunado authored
Pre-v8.2 platforms such as the Juno platform does not have the Scalable Vector Extensions implemented and so the build option ENABLE_SVE is set to zero. This has a minor performance improvement with no functional impact. Change-Id: Ib072735db7a0247406f8b60e325b7e28b1e04ad1 Signed-off-by: David Cunado <david.cunado@arm.com>
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- 14 Jul, 2017 1 commit
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Isla Mitchell authored
This fix modifies the order of system includes to meet the ARM TF coding standard. There are some exceptions to this change in order to retain header groupings and where there are headers within #if statements. Change-Id: Ib5b668c992d817cc860e97b29e16ef106d17e404 Signed-off-by: Isla Mitchell <isla.mitchell@arm.com>
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- 08 Jun, 2017 3 commits
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Lin Huang authored
unlike rk3399 and rk3368, there are some rockchip 64bit SOC do not have CPUPD, and pmu_cpuson_entrypoint() is common function for rockchip platform, so we need to check wakeup cpu when resume. Change-Id: I6313e8a9d7c16b03e033414f0cb281646c2159ff Signed-off-by: Lin Huang <hl@rock-chips.com>
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Lin Huang authored
with PMU_PERILP_PD_EN bit enable, the soc will shutdown cm0, crypto, dcf, imem(normal SRAM), dmac, bootrom, efuse_con, spi, i2c, uart, saradc, tsadc when suspend, we have M0 code need to run when suspend in normal SRAM, so we need to take care of that. Change-Id: I8c066637e5b81d4b1d53197450b9d592cbe00793 Signed-off-by: Lin Huang <hl@rock-chips.com> Signed-off-by: Derek Basehore <dbasehore@chromium.org> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
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Lin Huang authored
the function pmu_cpuon_entrypoint() need to run in the pmusram, we just copy bin file to pmusram before, now we add pmusram section and link pmu_cpuon_entrypoint() to pmusram directly Change-Id: Iae31e4c01c480c8e6f565a8f588332b478efdb16 Signed-off-by: Lin Huang <hl@rock-chips.com> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
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- 03 May, 2017 1 commit
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dp-arm authored
To make software license auditing simpler, use SPDX[0] license identifiers instead of duplicating the license text in every file. NOTE: Files that have been imported by FreeBSD have not been modified. [0]: https://spdx.org/ Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761a Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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- 20 Mar, 2017 1 commit
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dp-arm authored
These source file definitions should be defined in generic Makefiles so that all platforms can benefit. Ensure that the symbols are properly marked as weak so they can be overridden by platforms. NOTE: This change is a potential compatibility break for non-upstream platforms. Change-Id: I7b892efa9f2d6d216931360dc6c436e1d10cffed Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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- 03 Mar, 2017 1 commit
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tony.xie authored
Change-Id: I6d39b4cac9b34b1f841e9bbddaf9c49785ba0c5e Signed-off-by: tony.xie <tony.xie@rock-chips.com>
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- 23 Jan, 2017 1 commit
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Masahiro Yamada authored
One nasty part of ATF is some of boolean macros are always defined as 1 or 0, and the rest of them are only defined under certain conditions. For the former group, "#if FOO" or "#if !FOO" must be used because "#ifdef FOO" is always true. (Options passed by $(call add_define,) are the cases.) For the latter, "#ifdef FOO" or "#ifndef FOO" should be used because checking the value of an undefined macro is strange. Here, IMAGE_BL* is handled by make_helpers/build_macro.mk like follows: $(eval IMAGE := IMAGE_BL$(call uppercase,$(3))) $(OBJ): $(2) @echo " CC $$<" $$(Q)$$(CC) $$(TF_CFLAGS) $$(CFLAGS) -D$(IMAGE) -c $$< -o $$@ This means, IMAGE_BL* is defined when building the corresponding image, but *undefined* for the other images. So, IMAGE_BL* belongs to the latter group where we should use #ifdef or #ifndef. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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- 14 Dec, 2016 1 commit
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Antonio Nino Diaz authored
Some files have incorrect copyright notices, this patch fixes all files with deviations from the standard notice. Change-Id: I66b73e78a50a235acb55f1e2ec2052a42c0570d2 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 09 Aug, 2016 1 commit
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Soby Mathew authored
This patch migrates the upstream platform makefiles to include the console drivers from the new location in ARM Trusted Firmware code base. Change-Id: I866d6c4951e475de1f836ce8a8c1d5e6da9577e3
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- 19 Jul, 2016 1 commit
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Soby Mathew authored
The `plat_psci_common.c` was moved to the new location `plat/common` and a stub file was retained at previous location for compatibility. This patch modifies the platform makefiles to include the file from the new location. Change-Id: Iabddeeb824e9a5d72d176d7c644735966c8c0699
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- 18 Jul, 2016 2 commits
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Tony Xie authored
1.Fixes the suspend/resume some bugs. 2.Add the power domain for saving power consumption. 3.Add cpu clusters suspend for rk3399 SoCs Change-Id: Id602779016b41d6281f4ba40a20229d909b28e46
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Caesar Wang authored
Software executing in the normal world and in the trusted world at exception levels lower than EL3 will request runtime services using the SMC instruction. See the documentation here: https://github.com/ARM-software/arm-trusted-firmware/blob/master/docs/ rt-svc-writers-guide.md This to be implemented as an EL3 Runtime Service in rockchip BL31 platform port, using the "SiP Service Call" range as specified in the SMC Calling Convention. This doesn't support any SMC yet, we will support it in later. Change-Id: I0a638dd0b653c28b08f79d89f77ed7c69864017d
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- 27 May, 2016 1 commit
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Caesar Wang authored
We add plat parameter structs to support BL2 to pass variable-length, variable-type parameters to BL31. The parameters are structured as a link list. During bl31 setup time, we travse the list to process each parameter. throuth this way, we can get the reset or power off gpio parameter, and do hardware control in BL31. This structure also can pass other parameter to BL31 in future.
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- 20 May, 2016 1 commit
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Antonio Nino Diaz authored
Use the generic delay timer instead of having a specific platform file for configuring it. Change-Id: Ifa68b9c97cd96ae1190cee74d22d729af95e4537
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- 05 May, 2016 1 commit
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Sandrine Bailleux authored
This patch adds some debug assertions ensuring that array indices are within the bounds of the array. Change-Id: I96ee81d14834c1e92cdfb7e60b49995cdacfd93a
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- 04 May, 2016 1 commit
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Caesar Wang authored
This patch adds to support the suspend/resume for rk3399 SoCs. Signed-off-by: Shengfei xu <xsf@rock-chips.com> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
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- 25 Apr, 2016 1 commit
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Caesar Wang authored
This patch has the following change for rk3399. * Set the uart to 115200 since the loader decide to set uart baud to 115200Hz. So the ATF also should set uart baud to 115200. * We need ensure the bl31 base is greater than 4KB since there are have the shared mem for coreboot.(Note: the previous vesion was tested with uboot) Otherwise, we will happen the exception crash since the ddr area won't to work from the shared ram address in some cases. For example, the exception crash: CBFS: Found @ offset 19c80 size 24074 exception _sync_sp_el0 ELR = 0x0000000000008000 ESR = 0x0000000002000000 SPSR = 0x600003cc FAR = 0xffffffff00000000 SP = 0x00000000ff8ed230 ... X29 = 0x00000000ff8c1fc0 X30 = 0x000000000030e3b0 exception death Change-Id: I8bc557c6bcaf6804d2a313b38667d3e2517881d7 Signed-off-by: Caesar Wang <wxt@rock-chips.com>
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- 13 Apr, 2016 1 commit
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Soby Mathew authored
This patch modifies the upstream platform port makefiles to use the new xlat_tables library files. This patch also makes mmap region setup common between AArch64 and AArch32 for FVP platform port. The file `fvp_common.c` is moved from the `plat/arm/board/fvp/aarch64` folder to the parent folder as it is not specific to AArch64. Change-Id: Id2e9aac45e46227b6f83cccfd1e915404018ea0b
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- 12 Apr, 2016 1 commit
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Soby Mathew authored
This patch fixes the compilation error in Rockchip rk3368 platform port when it is built in release mode. Fixes ARM-software/tf-issues#389 Change-Id: I1a3508ac3a620289cf700e79db8f08569331ac53
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- 05 Apr, 2016 1 commit
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Tony Xie authored
This patch adds to support the RK3368 and RK3399 SoCs. RK3368/RK3399 is one of the Rockchip family SoCs, which is an multi-cores ARM SoCs. This patch adds support to boot the Trusted Firmware on RK3368/RK3399 SoCs, and adds support to boot secondary CPUs, enter/exit core power states for all CPUs in the slow/fast clusters. This is the initial version for rockchip SoCs.(RK3368/RK3399 and next SoCs) * Support arm gicv2 & gicv3. * Boot up multi-cores CPU. * Add generic CPU helper functions. * Support suspend/resume. * Add system_off & system_reset implementation. * Add delay timer platform implementation. * Support the new porting interface for the PSCI implementation. Change-Id: I704bb3532d65e8c70dbd99b512c5e6e440ea6f43 Signed-off-by: Tony Xie <tony.xie@rock-chips.com> Signed-off-by: Caesar Wang <wxt@rock-chips.com> Signed-off-by: Shengfei xu <xsf@rock-chips.com>
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