- 08 Nov, 2018 1 commit
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Antonio Nino Diaz authored
All identifiers, regardless of use, that start with two underscores are reserved. This means they can't be used in header guards. The style that this project is now to use the full name of the file in capital letters followed by 'H'. For example, for a file called "uart_example.h", the header guard is UART_EXAMPLE_H. The exceptions are files that are imported from other projects: - CryptoCell driver - dt-bindings folders - zlib headers Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 22 Aug, 2018 2 commits
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Andrew F. Davis authored
Texas Instrument's System Control Interface (TI-SCI) Message Protocol is used in Texas Instrument's System on Chip (SoC) such as those in K3 family AM654x SoCs to communicate between various compute processors with a central system controller entity. TI-SCI message protocol provides support for management of various hardware entities within the SoC. Add support driver to allow communication with system controller entity within the SoC. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Andreas Dannenberg <dannenberg@ti.com>
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Andrew F. Davis authored
Secure Proxy module manages hardware threads that are meant for communication between the processor entities. Add support for this here. Signed-off-by: Andrew F. Davis <afd@ti.com>
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- 29 Jun, 2018 1 commit
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Andrew F. Davis authored
Actions may need to be taken by the last core when all clusters have been shutdown. Add a top level root domain node to coordinate this between clusters. Signed-off-by: Andrew F. Davis <afd@ti.com>
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- 19 Jun, 2018 6 commits
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Nishanth Menon authored
Do proper initialization of GIC V3. This will allow CP15 access to GIC from "normal world" (aka HLOS) via mrc/mcr calls. K3 SoC family uses GICv3 compliant GIC500 without compatibility for legacy GICv2. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Benjamin Fair <b-fair@ti.com> Signed-off-by: Andrew F. Davis <afd@ti.com>
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Nishanth Menon authored
Provide K3_TIMER_FREQUENCY for the platform configuration if the GTC clock is selected statically and override option if the platform has a different configuration. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Benjamin Fair <b-fair@ti.com>
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Nishanth Menon authored
Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Benjamin Fair <b-fair@ti.com> Signed-off-by: Andrew F. Davis <afd@ti.com>
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Nishanth Menon authored
This library will be used to properly set up mappings from different bootloaders at different exception levels. It ensures that memory mapped devices such as UARTs are still accessible and memory regions have the correct access permissions. Signed-off-by: Benjamin Fair <b-fair@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Andrew F. Davis <afd@ti.com>
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Benjamin Fair authored
The K3 family of SoCs has multiple interconnects. The key interconnect for high performance processors is the MSMC3 interconnect. This is an io-coherent interconnect which exports multiple ports for each processor cluster. Sometimes, port 0 of the MSMC may not have an ARM cluster OR is isolated such that the instance of ATF does not manage it. Define macros in platform_def.h to help handle this. Signed-off-by: Benjamin Fair <b-fair@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Andrew F. Davis <afd@ti.com>
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Nishanth Menon authored
Create the baseline Makefile, platform definitions file and platform specific assembly macros file. This includes first set of constants for the platform including cache sizes and linker format and a stub for BL31 and the basic memory layout K3 SoC family of processors do not use require a BL1 or BL2 binary, since such functions are provided by an system controller on the SoC. This lowers the burden of ATF to purely managing the local ARM cores themselves. Signed-off-by: Benjamin Fair <b-fair@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Andrew F. Davis <afd@ti.com>
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