1. 22 Aug, 2018 9 commits
  2. 20 Aug, 2018 2 commits
    • Jeenu Viswambharan's avatar
      RAS: MISRA fixes · 30a8d96e
      Jeenu Viswambharan authored
      
      
      These changes address most of the required MISRA rules. In the process,
      some from generic code is also fixed.
      
      No functional changes.
      
      Change-Id: I76cacf6e1d73b09510561b5090c2bb66d81bec88
      Signed-off-by: default avatarJeenu Viswambharan <jeenu.viswambharan@arm.com>
      30a8d96e
    • Jeenu Viswambharan's avatar
      AArch64: Enable MPAM for lower ELs · 5f835918
      Jeenu Viswambharan authored
      
      
      Memory Partitioning And Monitoring is an Armv8.4 feature that enables
      various memory system components and resources to define partitions.
      Software running at various ELs can then assign themselves to the
      desired partition to control their performance aspects.
      
      With this patch, when ENABLE_MPAM_FOR_LOWER_ELS is set to 1, EL3 allows
      lower ELs to access their own MPAM registers without trapping to EL3.
      This patch however doesn't make use of partitioning in EL3; platform
      initialisation code should configure and use partitions in EL3 if
      required.
      
      Change-Id: I5a55b6771ccaa0c1cffc05543d2116b60cbbcdcd
      Co-authored-by: default avatarJames Morse <james.morse@arm.com>
      Signed-off-by: default avatarJeenu Viswambharan <jeenu.viswambharan@arm.com>
      5f835918
  3. 17 Aug, 2018 2 commits
  4. 10 Aug, 2018 1 commit
    • Antonio Nino Diaz's avatar
      xlat v2: Support the EL2 translation regime · 1a92a0e0
      Antonio Nino Diaz authored
      
      
      The translation library is useful elsewhere. Even though this repository
      doesn't exercise the EL2 support of the library, it is better to have it
      here as well to make it easier to maintain.
      
      enable_mmu_secure() and enable_mmu_direct() have been deprecated. The
      functions are still present, but they are behind ERROR_DEPRECATED and
      they call the new functions enable_mmu_svc_mon() and
      enable_mmu_direct_svc_mon().
      
      Change-Id: I13ad10cd048d9cc2d55e0fff9a5133671b67dcba
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      1a92a0e0
  5. 07 Aug, 2018 1 commit
    • Antonio Nino Diaz's avatar
      xlat v2: Flush xlat tables after being modified · 3e318e40
      Antonio Nino Diaz authored
      During cold boot, the initial translation tables are created with data
      caches disabled, so all modifications go to memory directly. After the
      MMU is enabled and data cache is enabled, any modification to the tables
      goes to data cache, and eventually may get flushed to memory.
      
      If CPU0 modifies the tables while CPU1 is off, CPU0 will have the
      modified tables in its data cache. When CPU1 is powered on, the MMU is
      enabled, then it enables coherency, and then it enables the data cache.
      Until this is done, CPU1 isn't in coherency, and the translation tables
      it sees can be outdated if CPU0 still has some modified entries in its
      data cache.
      
      This can be a problem in some cases. For example, the warm boot code
      uses only the tables mapped during cold boot, which don't normally
      change. However, if they are modified (and a RO page is made RW, or a XN
      page is made executable) the CPU will see the old attributes and crash
      when it tries to access it.
      
      This doesn't happen in systems with HW_ASSISTED_COHERENCY or
      WARMBOOT_ENABLE_DCACHE_EARLY. In these systems, the data cache is
      enabled at the same time as the MMU. As soon as this happens, the CPU is
      in coherency.
      
      There was an attempt of a fix in psci_helpers.S, but it didn't solve the
      problem. That code has been deleted. The code was introduced in commit
      <26441030
      
      > ("Invalidate TLB entries during warm boot").
      
      Now, during a map or unmap operation, the memory associated to each
      modified table is flushed. Traversing a table will also flush it's
      memory, as there is no way to tell in the current implementation if the
      table that has been traversed has also been modified.
      
      Change-Id: I4b520bca27502f1018878061bc5fb82af740bb92
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      3e318e40
  6. 06 Aug, 2018 1 commit
  7. 03 Aug, 2018 4 commits
    • Roberto Vargas's avatar
      Add support for romlib in the build system · 5accce5b
      Roberto Vargas authored
      
      
      Romlib is a new image that is stored in ROM and contains the code of
      several libraries that can be shared between different images. All
      the functions within in the library are accessed using a jump table
      which allows to update the romlib image whithout changing the binary
      compatibility. This jump table can be also stored in RAM and it can
      allow to patch a romlib with potential bugs fixes..
      
      Change-Id: If980ccdaca24b7aaca900e32acc68baf6f94ab35
      Signed-off-by: default avatarRoberto Vargas <roberto.vargas@arm.com>
      5accce5b
    • Roberto Vargas's avatar
      Add atexit function to libc · 6c373345
      Roberto Vargas authored
      
      
      We had exit but we didn't have atexit, and we were calling panic and
      tf_printf from exit, which generated a dependency from exit to them.
      Having atexit allows to set a different function pointer in every image.
      
      Change-Id: I95b9556d680d96249ed3b14da159b6f417da7661
      Signed-off-by: default avatarRoberto Vargas <roberto.vargas@arm.com>
      6c373345
    • Roberto Vargas's avatar
      Create a library file for libc · 61f72a34
      Roberto Vargas authored
      
      
      TF Makefile was linking all the objects files generated for the
      c library instead of creating a static library that could be
      used in the linking stage.
      
      Change-Id: I721daea097e9b13cbb42c9f8eaa2af8fea0799cf
      Signed-off-by: default avatarRoberto Vargas <roberto.vargas@arm.com>
      61f72a34
    • Roberto Vargas's avatar
      Create a library file for libfdt · fec36484
      Roberto Vargas authored
      
      
      TF Makefile was linking all the objects files generated for the
      fdt library instead of creating a static library that could be
      used in the linking stage.
      
      Change-Id: If3705bba188ec39e1fbf2322a7f2a9a941e1b90d
      Signed-off-by: default avatarRoberto Vargas <roberto.vargas@arm.com>
      fec36484
  8. 02 Aug, 2018 2 commits
  9. 30 Jul, 2018 1 commit
  10. 26 Jul, 2018 2 commits
  11. 24 Jul, 2018 4 commits
  12. 20 Jul, 2018 3 commits
  13. 15 Jul, 2018 2 commits
  14. 13 Jul, 2018 4 commits
    • Antonio Nino Diaz's avatar
      xlat v2: Turn MMU parameters into 64-bit values · 6563c0be
      Antonio Nino Diaz authored
      
      
      Most registers are 64-bit wide, even in AArch32 mode:
      
      - MAIR_ELx is equivalent to MAIR0 and MAIR1.
      - TTBR is 64 bit in both AArch64 and AArch32.
      
      The only difference is the TCR register, which is 32 bit in AArch32 and
      in EL3 in AArch64. For consistency with the rest of ELs in AArch64, it
      makes sense to also have it as a 64-bit value.
      
      Change-Id: I2274d66a28876702e7085df5f8aad0e7ec139da9
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      6563c0be
    • Antonio Nino Diaz's avatar
      xlat v2: Remove IMAGE_EL define · aa1d5f60
      Antonio Nino Diaz authored
      
      
      The Exception Level is now detected at runtime. This means that it is not
      needed to hardcode the EL used by each image.
      
      This doesn't result in a substantial increase of the image size because
      the initialization functions that aren't used are garbage-collected by
      the linker.
      
      In AArch32 the current EL has been changed from EL3 to EL1 because the
      the AArch32 PL1&0 translation regime behaves more like the AArch64 EL1&0
      translation regime than the EL3 one.
      
      Change-Id: I941404299ebe7666ca17619207c923b49a55cb73
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      aa1d5f60
    • Antonio Nino Diaz's avatar
      xlat v2: Remove unused tlbi helper · 8d164bc6
      Antonio Nino Diaz authored
      
      
      xlat_arch_tlbi_va_regime() isn't used, so it has been renamed to
      xlat_arch_tlbi_va() and the previous implementation has been removed.
      
      Change-Id: Ic118bed3fb68234748d86b2e9e95b25650289276
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      8d164bc6
    • Antonio Nino Diaz's avatar
      xlat v2: Remove architectural headers · 468e2382
      Antonio Nino Diaz authored
      
      
      They only contained one function that is easily integrated in the private
      library header and the existing architectural C files.
      
      This also helps making the library more portable, as the Makefile of the
      library now doesn't use the variable INCLUDES, which is specific to this
      codebase and doesn't respect the namespace of the library.
      
      Change-Id: I22228e6a97e9b4f346f5cd8947609263e8df71d8
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      468e2382
  15. 11 Jul, 2018 2 commits