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  1. 01 Mar, 2021 1 commit
  3. 19 Jan, 2021 3 commits
  5. 13 Jan, 2021 1 commit
    • Masahisa Kojima's avatar
      qemu/qemu_sbsa: enable secure variable storage · 74c87a4b
      Masahisa Kojima authored 
      

This implements support for UEFI secure variable storage
using standalone MM framework on qemu_sbsa platform.

Non-secure shared memory between UEFI and standalone MM
is allocated at the top of DRAM.
DRAM size of qemu_sbsa varies depends on the QEMU parameter,
so the non-secure shared memory is allocated by trusted firmware
and passed the base address and size to UEFI through device tree
"/reserved-memory" node.

Change-Id: I367191f408eb9850b7ec7761ee346b014c539767
Signed-off-by: default avatarMasahisa Kojima <masahisa.kojima@linaro.org>
      74c87a4b
  7. 01 Dec, 2020 1 commit
  9. 18 Aug, 2020 1 commit
  11. 03 Jun, 2020 1 commit
  13. 24 Jan, 2020 1 commit
  15. 01 Oct, 2019 2 commits
    • Radoslaw Biernacki's avatar
      qemu/qemu_sbsa: Adding memory mapping for both FLASH0/FLASH1 · fa405e3b
      Radoslaw Biernacki authored 
      This patch adds mapping for secure FLASH0 for qemu/virt and
qemu/qemu_sbsa platforms. This change is targeted for sbsa but since both
platforms share common code, changes in common defines was necessary.

For qemu_sbsa, this patch adds necessary mapping in order to boot without
semi-hosting from secure FLASH0. EFI need to stay in FLASH1 (share it with
variables) since it need to "run in place" in non secure domain. Changes
for this are under RFC at edk2-platforms mailing list:
https://patches.linaro.org/patch/171327/


(edk2-platforms/Platform/Qemu/SbsaQemu/SbsaQemu.dsc).

In docs qemu/virt is described as using semi-hosting, therefore this change
should be orthogonal to existing assumptions while giving possibility to
store both bl1 and fip in FLASH0 at some point (additional changes required
for that).
Signed-off-by: default avatarRadoslaw Biernacki <radoslaw.biernacki@linaro.org>
Change-Id: I782bc3637c91c01eaee680b3c5c408e24b4b6e28
      fa405e3b
    • Radoslaw Biernacki's avatar
      qemu/qemu_sbsa: Adding Qemu SBSA platform · 558a6f44
      Radoslaw Biernacki authored 
      

This patch introduces Qemu SBSA platform.
Both platform specific files where copied from qemu/qemu with changes for
DRAM base above 32bit and removal of ARMv7 conditional defines/code.
Documentation is aligned to rest of SBSA patches along the series and
planed changes in edk2-platform repo.

Fixes ARM-software/tf-issues#602
Signed-off-by: default avatarRadoslaw Biernacki <radoslaw.biernacki@linaro.org>
Change-Id: I8ebc34eedb2268365e479ef05654b2df1b99128c
      558a6f44
  17. 18 Sep, 2019 2 commits
    • Radoslaw Biernacki's avatar
      qemu: Simplify the image size calculation · 9a006ad1
      Radoslaw Biernacki authored 
      

Patch introduce the macro NS_IMAGE_MAX_SIZE to simplify the image size
calculation. Use of additional parenthesis removes the possibility of
improper calculations due nested macro expansion for subtraction.
In case of platforms with DRAM window over 32bits, patch also removes
potential problems with type casting, as meminfo.image_size is uint32_t
but macro calculations were done in 64bit space.
Signed-off-by: default avatarRadoslaw Biernacki <radoslaw.biernacki@linaro.org>
Change-Id: I2d05a2d9dd6000dba6114df53262995cf85af018
      9a006ad1
    • Radoslaw Biernacki's avatar
      qemu: introducing sub-platforms to qemu platform · 301d27d9
      Radoslaw Biernacki authored 
      

This commit change the plat/qemu directory structure into:

`-- plat
    `-- qemu
        |-- common    (files shared with all qemu subplatforms)
        |-- qemu      (original qemu platform)
        |-- qemu_sbsa (new sqemu_sbsa platform)
        |-- subplat1
        `-- subplat2

This opens the possibility of adding new qemu sub-platforms which reuse
existing common platform code. The first platform which will leverage new
structure will be SBSA platform.
Signed-off-by: default avatarRadoslaw Biernacki <radoslaw.biernacki@linaro.org>
Signed-off-by: default avatarSandrine Bailleux <sandrine.bailleux@arm.com>
Change-Id: Id0d8133e1fffc1b574b69aa2770ebc02bb837a9b
      301d27d9
  19. 26 Jul, 2019 2 commits
  21. 04 Jan, 2019 1 commit
    • Antonio Nino Diaz's avatar
      Sanitise includes across codebase · 09d40e0e
      Antonio Nino Diaz authored 
      Enforce full include path for includes. Deprecate old paths.

The following folders inside include/lib have been left unchanged:

- include/lib/cpus/${ARCH}
- include/lib/el3_runtime/${ARCH}

The reason for this change is that having a global namespace for
includes isn't a good idea. It defeats one of the advantages of having
folders and it introduces problems that are sometimes subtle (because
you may not know the header you are actually including if there are two
of them).

For example, this patch had to be created because two headers were
called the same way: e0ea0928 ("Fix gpio includes of mt8173 platform
to avoid collision."). More recently, this patch has had similar
problems: 46f9b2c3 ("drivers: add tzc380 support").

This problem was introduced in commit 4ecca339

 ("Move include and
source files to logical locations"). At that time, there weren't too
many headers so it wasn't a real issue. However, time has shown that
this creates problems.

Platforms that want to preserve the way they include headers may add the
removed paths to PLAT_INCLUDES, but this is discouraged.

Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f
Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      09d40e0e
  23. 18 Oct, 2018 1 commit
  25. 20 Jul, 2018 1 commit
  27. 20 Mar, 2018 1 commit
    • Michalis Pappas's avatar
      qemu: Add support for stack canary protection · f68d22e8
      Michalis Pappas authored 
      

Allow qemu users to enable stack protection. Since the virt platform
does not provide an RNG, use a basic, timer-based, canary generation,
similarly to FVP.

Increase SRAM size and BL2 size to fit images when stack protection is
enabled.

Notice that stack protection is not enabled by default in qemu.

Fixes ARM-software/tf-issues#568
Signed-off-by: default avatarMichalis Pappas <mpappas@fastmail.fm>
      f68d22e8
  29. 04 Mar, 2018 1 commit
  31. 28 Feb, 2018 1 commit
    • Michalis Pappas's avatar
      qemu: Support SEPARATE_CODE_AND_RODATA · 27e0ccab
      Michalis Pappas authored 
      

Update qemu_configure_mmu_##_el to add an additional region for code,
marked as MT_CODE | MT_SECURE. Update ro region attributes to NON_EXEC.

Update calls to QEMU_CONFIGURE_BLx_MMU() to pass an additional region for
code. Update calls to pass regions defined in common_def.h.

Increase MAX_MMAP_REGIONS to 10.

Enable SEPARATE_CODE_AND_RODATA by default on QEMU builds.

Fixes ARM-software/tf-issues#558
Signed-off-by: default avatarMichalis Pappas <mpappas@fastmail.fm>
      27e0ccab
  33. 27 Feb, 2018 1 commit
  35. 05 Feb, 2018 1 commit
    • Etienne Carriere's avatar
      qemu: support ARMv7/Cortex-A15 · 765ed9fc
      Etienne Carriere authored 
      

Define Qemu AArch32 implementation for some platform functions
(core position, secondary boot cores, crash console). These are
derived from the AArch64 implementation.

BL31 on Qemu is needed only for ARMv8 and later. On ARMv7, BL32 is
the first executable image after BL2.

Support SP_MIN and OP-TEE as BL32: create a sp_min make script target
in Qemu, define mapping for IMAGE_BL32

Minor fix Qemu return value type for plat_get_ns_image_entrypoint().

Qemu model for the Cortex-A15 does not support the virtualization
extension although the core expects it. To overcome the issue, Qemu
ARMv7 configuration set ARCH_SUPPORTS_VIRTUALIZATION to 0.

Add missing AArch32 assembly macro arm_print_gic_regs from ARM platform
used by the Qemu platform.

Qemu Cortex-A15 model integrates a single cluster with up to 4 cores.

Change-Id: I65b44399071d6f5aa40d5183be11422b9ee9ca15
Signed-off-by: default avatarEtienne Carriere <etienne.carriere@linaro.org>
      765ed9fc
  37. 26 Oct, 2017 1 commit
  39. 24 Oct, 2017 1 commit
    • Etienne Carriere's avatar
      qemu: fix holding pen mailbox sequence · 33dd33f8
      Etienne Carriere authored 
      

Before this change, plat_secondary_cold_boot_setup reads wake up mailbox
as a byte array but through 64bit accesses on unaligned 64bit addresses.
In the other hand qemu_pwr_domain_on wakes secondary cores by writing
into a 64bit array.

This change forces the 64bit mailbox format as PLAT_QEMU_HOLD_ENTRY_SIZE
explicitly specifies it.
Signed-off-by: default avatarEtienne Carriere <etienne.carriere@linaro.org>
      33dd33f8
  41. 24 Aug, 2017 2 commits
  43. 03 May, 2017 1 commit
  45. 18 Jan, 2017 1 commit
  47. 09 Jun, 2016 1 commit