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  1. 19 Nov, 2019 2 commits
    • Justin Chadwell's avatar
      Enable -Wlogical-op always · d7b4cd41
      Justin Chadwell authored 
      

-Wlogical-op prevents common errors with using numerical constants where
a boolean one is expected as well as when the operands of a logical
operator are the same. While these are perfectly valid behavior, they
can be a sign that something is slightly off.

This patch adds this warning to gcc and it's closest equivalent to
clang, while also fixing any warnings that enabling them causes.

Change-Id: Iabadfc1e6ee0c44eef6685a23b0aed8abef8ce89
Signed-off-by: default avatarJustin Chadwell <justin.chadwell@arm.com>
      d7b4cd41
    • Justin Chadwell's avatar
      Enable -Wshadow always · b7f6525d
      Justin Chadwell authored 
      

Variable shadowing is, according to the C standard, permitted and valid
behaviour. However, allowing a local variable to take the same name as a
global one can cause confusion and can make refactoring and bug hunting
more difficult.

This patch moves -Wshadow from WARNING2 into the general warning group
so it is always used. It also fixes all warnings that this introduces
by simply renaming the local variable to a new name

Change-Id: I6b71bdce6580c6e58b5e0b41e4704ab0aa38576e
Signed-off-by: default avatarJustin Chadwell <justin.chadwell@arm.com>
      b7f6525d
  3. 15 Nov, 2019 1 commit
    • Alexei Fedorov's avatar
      GIC-600: Fix power up sequence · 7a7fbb12
      Alexei Fedorov authored 
      

Arm's GIC-600 features a Power Register (GICR_PWRR),
which needs to be programmed to enable redistributor
operation. Section 3.6.1 in the GIC-600 TRM describes
the power-up and power-down sequence in pseudo code,
which deviates from the current TF-A implementation
in drivers/arm/gic/v3/gic600.c.
For powering on a redistributor, the pseudo code suggests
to loop over the whole sequence (check for transition,
write request bit) instead of just looping over the
ready bit read as TF-A does in gic600_pwr_on().
This patch fixes GIC-600 power up sequence according
to the TRM.

Change-Id: I445c480e96ba356b69a2d8e5308ffe6c0a97f45b
Signed-off-by: default avatarAlexei Fedorov <Alexei.Fedorov@arm.com>
      7a7fbb12
  5. 14 Nov, 2019 1 commit
  7. 11 Nov, 2019 1 commit
  9. 01 Nov, 2019 1 commit
  11. 08 Oct, 2019 1 commit
    • Avinash Mehta's avatar
      Correct UART PL011 initialization calculation · 38d5e150
      Avinash Mehta authored 
      

Currently for Armv7 plaforms the quotient calculated in pl011
uart init code is moved to register r1.

This patch moves the quotient to register r2 as done for other
platforms in the udiv instruction. Value of register r2 is then
used to calculate the values for IBRD and FBRD register

Change-Id: Ie6622f9f0e6d634378b471df5d02823b492c8a24
Signed-off-by: default avatarAvinash Mehta <avinash.mehta@arm.com>
      38d5e150
  13. 03 Oct, 2019 2 commits
  15. 26 Sep, 2019 1 commit
    • Madhukar Pappireddy's avatar
      GICv3: Enable multi socket GIC redistributor frame discovery · ec834925
      Madhukar Pappireddy authored 
      

This patch provides declaration and definition of new GICv3 driver
API: gicv3_rdistif_probe().This function delegates the responsibility
of discovering the corresponding Redistributor base frame to each CPU
itself. It is a modified version of gicv3_rdistif_base_addrs_probe()
and is executed by each CPU in the platform unlike the previous
approach in which only the Primary CPU did the discovery of all the
Redistributor frames for every CPU.

The flush operations as part of gicv3_driver_init() function are
made necessary even for platforms with WARMBOOT_ENABLE_DCACHE_EARLY
because the GICv3 driver data structure contents are accessed by CPU
with D-Cache turned off during power down operations.

Change-Id: I1833e81d3974b32a3e4a3df4766a33d070982268
Signed-off-by: default avatarMadhukar Pappireddy <madhukar.pappireddy@arm.com>
      ec834925
  17. 23 Sep, 2019 1 commit
    • Lionel Debieve's avatar
      stm32mp1: add authentication support for stm32image · 4bdb1a7a
      Lionel Debieve authored 
      

This commit adds authentication binary support for STM32MP1.
It prints the bootrom authentication result if signed
image is used and authenticates the next loaded STM32 images.
It also enables the dynamic translation table support
(PLAT_XLAT_TABLES_DYNAMIC) to use bootrom services.
Signed-off-by: default avatarLionel Debieve <lionel.debieve@st.com>
Change-Id: Iba706519e0dc6b6fae1f3dd498383351f0f75f51
      4bdb1a7a
  19. 20 Sep, 2019 2 commits
  21. 18 Sep, 2019 2 commits
  23. 13 Sep, 2019 3 commits
  25. 12 Sep, 2019 2 commits
    • Justin Chadwell's avatar
      Remove RSA PKCS#1 v1.5 support from cert_tool · 6a415a50
      Justin Chadwell authored 
      Support for PKCS#1 v1.5 was deprecated in SHA 1001202d and fully removed
in SHA fe199e3b

, however, cert_tool is still able to generate
certificates in that form. This patch fully removes the ability for
cert_tool to generate these certificates.

Additionally, this patch also fixes a bug where the issuing certificate
was a RSA and the issued certificate was EcDSA. In this case, the issued
certificate would be signed using PKCS#1 v1.5 instead of RSAPSS per
PKCS#1 v2.1, preventing TF-A from verifying the image signatures. Now
that PKCS#1 v1.5 support is removed, all certificates that are signed
with RSA now use the more modern padding scheme.

Change-Id: Id87d7d915be594a1876a73080528d968e65c4e9a
Signed-off-by: default avatarJustin Chadwell <justin.chadwell@arm.com>
      6a415a50
    • Justin Chadwell's avatar
      Support larger RSA key sizes when using MBEDTLS · aacff749
      Justin Chadwell authored 
      

Previously, TF-A could not support large RSA key sizes as the
configuration options passed to MBEDTLS prevented storing and performing
calculations with the larger, higher-precision numbers required. With
these changes to the arguments passed to MBEDTLS, TF-A now supports
using 3072 (3K) and 4096 (4K) keys in certificates.

Change-Id: Ib73a6773145d2faa25c28d04f9a42e86f2fd555f
Signed-off-by: default avatarJustin Chadwell <justin.chadwell@arm.com>
      aacff749
  27. 10 Sep, 2019 1 commit
  29. 05 Sep, 2019 2 commits
  31. 02 Sep, 2019 7 commits
  33. 29 Aug, 2019 9 commits
  35. 19 Aug, 2019 1 commit