- 09 Sep, 2016 1 commit
-
-
Caesar Wang authored
some specific board need to disable/enable specific gpio when suspend/resume, so we add this function, bootloader can pass the specific gpio, and we can handle these gpios in bl31 suspend/resuem function. Change-Id: I373b03ef9202ee4a05a2b9caacdfa01b47ee2177
-
- 08 Sep, 2016 1 commit
-
-
Tony Xie authored
As rk3399 reported the d8/octane scores drop 10% with cpu idle. The root cause is thc cpu cluster enter the slow mode. We don't need switch the clock to 24MHz if cpu cluster enter the retention mode. In order to improve performance, it just needs for cluster enter powering off mode. Also, we shouldn't do anything for hlvl if the system is off. Change-Id: I2a02962a01343abd0cba47ed63192c1cdf88b119
-
- 25 Aug, 2016 1 commit
-
-
Caesar Wang authored
For the PMU design, we don't expect to get the interrupts before enter the power mode. Since that will cause the confusion for the state machine in the power mode. Change-Id: Id8dee79ae617a66271b5caf92caf35f520f45099
-
- 11 Aug, 2016 1 commit
-
-
Caesar Wang authored
Sometimes this will cause the long delay for suspend/resume. Since the 24M OCS will be turned off in power mode. Also, remove the ERROR_DEPRECATED config define. Change-Id: I78f21c35912c2250972e551695cdacc7bc4c020a
-
- 28 Jul, 2016 1 commit
-
-
Caesar Wang authored
1. Remove the AP_PWROFF in ATF, should configure it in kernel. 2. Save and restore the PWMs pin/regs for suspend/resume. 3. The pmusgrf reset-hold bits needs to be released. since the pmusgrf reset-hold bits needs to be held. 4. Configure the PMU power up/down cycles about delay 3ms. 5. With the MMIO register block as one big mapping. 6. Fix the build error with psci_entrypoint since PSCI lib updated. Fixes the commit 9ec78bdf ("rockchip: support the suspend/resume for rk3399"). Change-Id: I112806700bf433c87763aac23d22fa7e6a7f5264
-
- 18 Jul, 2016 2 commits
-
-
Tony Xie authored
1.Fixes the suspend/resume some bugs. 2.Add the power domain for saving power consumption. 3.Add cpu clusters suspend for rk3399 SoCs Change-Id: Id602779016b41d6281f4ba40a20229d909b28e46
-
Caesar Wang authored
Software executing in the normal world and in the trusted world at exception levels lower than EL3 will request runtime services using the SMC instruction. See the documentation here: https://github.com/ARM-software/arm-trusted-firmware/blob/master/docs/ rt-svc-writers-guide.md This to be implemented as an EL3 Runtime Service in rockchip BL31 platform port, using the "SiP Service Call" range as specified in the SMC Calling Convention. This doesn't support any SMC yet, we will support it in later. Change-Id: I0a638dd0b653c28b08f79d89f77ed7c69864017d
-
- 08 Jul, 2016 1 commit
-
-
Sandrine Bailleux authored
This patch introduces a new header file: include/lib/utils.h. Its purpose is to provide generic macros and helper functions that are independent of any BL image, architecture, platform and even not specific to Trusted Firmware. For now, it contains only 2 macros: ARRAY_SIZE() and IS_POWER_OF_TWO(). These were previously defined in bl_common.h and xlat_tables.c respectively. bl_common.h includes utils.h to retain compatibility for platforms that relied on bl_common.h for the ARRAY_SIZE() macro. Upstream platform ports that use this macro have been updated to include utils.h. Change-Id: I960450f54134f25d1710bfbdc4184f12c049a9a9
-
- 27 May, 2016 3 commits
-
-
Caesar Wang authored
if define power off gpio, BL31 will do system power off through gpio control.
-
Caesar Wang authored
We add plat parameter structs to support BL2 to pass variable-length, variable-type parameters to BL31. The parameters are structured as a link list. During bl31 setup time, we travse the list to process each parameter. throuth this way, we can get the reset or power off gpio parameter, and do hardware control in BL31. This structure also can pass other parameter to BL31 in future.
-
Caesar Wang authored
There are 5 groups of GPIO (GPIO0~GPIO4), totally have 122 GPIOs on rk3399 platform. The pull direction(pullup or pulldown) for all of GPIOs are software-programmable. At the moment, we add the gpio basic driver since reset or power off the devices from gpio configuration for BL31.
-
- 20 May, 2016 2 commits
-
-
Antonio Nino Diaz authored
Use the generic delay timer instead of having a specific platform file for configuring it. Change-Id: Ifa68b9c97cd96ae1190cee74d22d729af95e4537
-
Antonio Nino Diaz authored
Replaced plat_get_syscnt_freq by plat_get_syscnt_freq2 on all upstream platforms. Change-Id: I3248f3f65a16dc5e9720012a05c35b9e3ba6abbe
-
- 04 May, 2016 1 commit
-
-
Caesar Wang authored
This patch adds to support the suspend/resume for rk3399 SoCs. Signed-off-by: Shengfei xu <xsf@rock-chips.com> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
-
- 21 Apr, 2016 1 commit
-
-
Yatharth Kochar authored
This patch moves the definition for `plat_get_syscnt_freq()` from arm_bl31_setup.c to arm_common.c. This could be useful in case a delay timer needs to be installed based on the generic timer in other BLs. This patch also modifies the return type for this function from `uint64_t` to `unsigned long long` within ARM and other platform files. Change-Id: Iccdfa811948e660d4fdcaae60ad1d700e4eda80d
-
- 14 Apr, 2016 1 commit
-
-
Gerald Lejeune authored
It is up to the platform to implement the new plat_crash_print_regs macro to report all relevant platform registers helpful for troubleshooting. plat_crash_print_regs merges or calls previously defined plat_print_gic_regs and plat_print_interconnect_regs macros for each existing platforms. NOTE: THIS COMMIT REQUIRES ALL PLATFORMS THAT ENABLE THE `CRASH_REPORTING` BUILD FLAG TO MIGRATE TO USE THE NEW `plat_crash_print_regs()` MACRO. BY DEFAULT, `CRASH_REPORTING` IS ENABLED IN DEBUG BUILDS FOR ALL PLATFORMS. Fixes: arm-software/tf-issues#373 Signed-off-by: Gerald Lejeune <gerald.lejeune@st.com>
-
- 05 Apr, 2016 1 commit
-
-
Tony Xie authored
This patch adds to support the RK3368 and RK3399 SoCs. RK3368/RK3399 is one of the Rockchip family SoCs, which is an multi-cores ARM SoCs. This patch adds support to boot the Trusted Firmware on RK3368/RK3399 SoCs, and adds support to boot secondary CPUs, enter/exit core power states for all CPUs in the slow/fast clusters. This is the initial version for rockchip SoCs.(RK3368/RK3399 and next SoCs) * Support arm gicv2 & gicv3. * Boot up multi-cores CPU. * Add generic CPU helper functions. * Support suspend/resume. * Add system_off & system_reset implementation. * Add delay timer platform implementation. * Support the new porting interface for the PSCI implementation. Change-Id: I704bb3532d65e8c70dbd99b512c5e6e440ea6f43 Signed-off-by: Tony Xie <tony.xie@rock-chips.com> Signed-off-by: Caesar Wang <wxt@rock-chips.com> Signed-off-by: Shengfei xu <xsf@rock-chips.com>
-