1. 24 Oct, 2016 1 commit
    • Caesar Wang's avatar
      rockchip: optimize the link mechanism for SRAM code · ec693569
      Caesar Wang authored
      
      
      Add the common extra.ld.S and customized rk3399.ld.S to extend
      to more features for different platforms.
      For example, we can add SRAM section and specific address to
      load there if we need it, and the common bl31.ld.S not need to
      be modified.
      
      Therefore, we can remove the unused codes which copying explicitly
      from the function pmusram_prepare(). It looks like more clear.
      
      Change-Id: Ibffa2da5e8e3d1d2fca80085ebb296ceb967fce8
      Signed-off-by: default avatarXing Zheng <zhengxing@rock-chips.com>
      Signed-off-by: default avatarCaesar Wang <wxt@rock-chips.com>
      ec693569
  2. 27 May, 2016 1 commit
    • Caesar Wang's avatar
      rockchip: add reset or power off gpio configuration for rk3399 · 68ff45f4
      Caesar Wang authored
      We add plat parameter structs to support BL2 to pass variable-length,
      variable-type parameters to BL31. The parameters are structured as a
      link list. During bl31 setup time, we travse the list to process each
      parameter. throuth this way, we can get the reset or power off gpio
      parameter, and do hardware control in BL31. This structure also can
      pass other parameter to BL31 in future.
      68ff45f4
  3. 20 May, 2016 1 commit
  4. 05 Apr, 2016 1 commit
    • Tony Xie's avatar
      Support for Rockchip's family SoCs · 6fba6e04
      Tony Xie authored
      
      
      This patch adds to support the RK3368 and RK3399 SoCs.
      
      RK3368/RK3399 is one of the Rockchip family SoCs, which is an
      multi-cores ARM SoCs.
      
      This patch adds support to boot the Trusted Firmware on RK3368/RK3399
      SoCs, and adds support to boot secondary CPUs, enter/exit core
      power states for all CPUs in the slow/fast clusters.
      
      This is the initial version for rockchip SoCs.(RK3368/RK3399 and next SoCs)
      * Support arm gicv2 & gicv3.
      * Boot up multi-cores CPU.
      * Add generic CPU helper functions.
      * Support suspend/resume.
      * Add system_off & system_reset implementation.
      * Add delay timer platform implementation.
      * Support the new porting interface for the PSCI implementation.
      
      Change-Id: I704bb3532d65e8c70dbd99b512c5e6e440ea6f43
      Signed-off-by: default avatarTony Xie <tony.xie@rock-chips.com>
      Signed-off-by: default avatarCaesar Wang <wxt@rock-chips.com>
      Signed-off-by: default avatarShengfei xu <xsf@rock-chips.com>
      6fba6e04
  5. 01 Apr, 2016 1 commit
  6. 09 Mar, 2016 1 commit
  7. 26 Jan, 2016 1 commit
  8. 11 Aug, 2015 1 commit
    • CC Ma's avatar
      Initial platform port for MediaTek mt8173 · 7d116dcc
      CC Ma authored
      
      
      - Boot up 4 cores.
      - Add a generic UART driver.
      - Add generic CPU helper functions
      - Supoort suspend
      - Add system_off & system_reset implementation
      - Add crash console reporting implementation
      - Add get_sys_suspend_power_state() for PSCI 1.0 SYSTEM_SUSPEND
      - Add Mediatek SIP runtime service
      - Add delay timer platform implementation
      
      Change-Id: I44138249f115ee10b9cbd26fdbc2dd3af04d825f
      Signed-off-by: default avatarCC Ma <cc.ma@mediatek.com>
      Signed-off-by: default avatarJimmy Huang <jimmy.huang@mediatek.com>
      7d116dcc