- 27 Feb, 2019 2 commits
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Chandni Cherukuri authored
Replace all usage of 'sgiclark' with 'rdn1e1edge' and 'sgiclarkh' with 'rde1edge' as per the updated product names. Change-Id: I14e9b0332851798531de21d70eb54f1e5557a7bd Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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Chandni Cherukuri authored
Replace all usage of 'sgiclark' with 'rdn1e1edge' and 'sgiclarka' with 'rdn1edge' as per the updated product names. Change-Id: Idbc157c73477ec32f507ba2d4a4e907d8813374c Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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- 19 Feb, 2019 4 commits
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Usama Arif authored
Cortex A5 doesnt support VFP, Large Page addressing and generic timer which are addressed in this patch. The device tree for Cortex a5 is also included. Change-Id: I0722345721b145dfcc80bebd36a1afbdc44bb678 Signed-off-by: Usama Arif <usama.arif@arm.com>
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Usama Arif authored
This patch adds support for Versatile express FVP (Fast models). Versatile express is a family of platforms that are based on ARM v7. Currently this port has only been tested on Cortex A7, although it should work with other ARM V7 cores that support LPAE, generic timers, VFP and hardware divide. Future patches will support other cores like Cortex A5 that dont support features like LPAE and hardware divide. This platform is tested on and only expected to work on single core models. Change-Id: I10893af65b8bb64da7b3bd851cab8231718e61dd Signed-off-by: Usama Arif <usama.arif@arm.com>
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John Tsichritzis authored
Change-Id: I1adcf195c0ba739002f3a59e805c782dd292ccba Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
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John Tsichritzis authored
Change-Id: Ideb49011da35f39ff1959be6f5015fa212ca2b6b Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
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- 18 Feb, 2019 1 commit
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Usama Arif authored
The variable is renamed to PLAT_ARM_RUN_UART as the UART is used outside BL31 as well. Change-Id: I00e3639dfb2001758b7d24548c11236c6335f64a Signed-off-by: Usama Arif <usama.arif@arm.com>
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- 12 Feb, 2019 1 commit
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Antonio Nino Diaz authored
Rather than letting the Trusty makefile set the option to enable dynamic translation tables, make platforms do it themselves. This also allows platforms to replace the implementation of the translation tables library as long as they use the same function prototypes. Change-Id: Ia60904f61709ac323addcb57f7a83391d9e21cd0 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 01 Feb, 2019 1 commit
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Sandrine Bailleux authored
PLAT_ARM_NS_IMAGE_OFFSET is in fact not an offset relative to some base address, it is an absolute address. Rename it to avoid any confusion. Change-Id: I1f7f5e8553cb267786afe7e5f3cd4d665b610d3f Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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- 25 Jan, 2019 6 commits
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Antonio Nino Diaz authored
Change-Id: I670ea80e0331c2d4b2ccfa563a45469a43f6902d Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Change-Id: Ia601d5ad65ab199e747fb60af4979b7db477d249 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Change-Id: I656753a1825ea7340a3708b950fa6b57455e9056 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Change-Id: I8989d2aa0258bf3b50a856c5b81532d578600124 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
The PLAT_XLAT_TABLES_DYNAMIC build option, defined in platform_def.h in Arm platforms, is checked by several headers, affecting their behaviour. To avoid issues around the include ordering of the headers, the definition should be moved to the platform's makefile. Change-Id: I0e12365c8d66309122e8a20790e1641a4f480a10 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Use full include paths like it is done for common includes. This cleanup was started in commit d40e0e08283a ("Sanitise includes across codebase"), but it only cleaned common files and drivers. This patch does the same to Arm platforms. Change-Id: If982e6450bbe84dceb56d464e282bcf5d6d9ab9b Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 23 Jan, 2019 1 commit
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Sathees Balya authored
On ARM platforms, the BL2 memory can be overlaid by BL31/BL32. The memory descriptors describing the list of executable images are created in BL2 R/W memory, which could be possibly corrupted later on by BL31/BL32 due to overlay. This patch creates a reserved location in SRAM for these descriptors and are copied over by BL2 before handing over to next BL image. Also this patch increases the PLAT_ARM_MAX_BL2_SIZE for juno when TBBR is enabled. Fixes ARM-Software/tf-issues#626 Change-Id: I755735706fa702024b4032f51ed4895b3687377f Signed-off-by: Sathees Balya <sathees.balya@arm.com>
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- 22 Jan, 2019 1 commit
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Antonio Nino Diaz authored
The SPM implementation based on MM is going to be kept for the foreseeable future. Change-Id: I11e96778a4f52a1aa803e7e048d9a7cb24a53954 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Acked-by: Sumit Garg <sumit.garg@linaro.org>
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- 15 Jan, 2019 1 commit
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Antonio Nino Diaz authored
From now on, platform_def.h must include any header with definitions that are platform-specific (like arm_def.h) and the included headers mustn't include back platform_def.h, and shouldn't be used by other files. Only platform_def.h should be included in other files. This will ensure that all needed definitions are present, rather than needing to include all the headers in all the definitions' headers just in case. This also prevents problems like cyclic dependencies. Change-Id: I9d3cf4d1de4b956fa035c79545222697acdaf5ca Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 08 Jan, 2019 2 commits
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Joel Hutton authored
A previous commit 89f2e589 ("plat/arm: remove weak implemention of 'plat_arm_psci_override_pm_ops' function") introduced a problem with the CSS_USE_SCMI_SDS_DRIVER configuration. In juno_pm.c the css_scmi_override_pm_ops function was used regardless of whether the flag was set. This patch ifdefs the function to restore the original behaviour. Change-Id: I508025ba70cf3a9250cc6270c1df209179c37ae7 Signed-off-by: Joel Hutton <Joel.Hutton@Arm.com>
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Ard Biesheuvel authored
Update some asserts that refer to #defines that only occur in ARM platforms, preventing this code to be used on other platforms. Instead, use a platform agnostic name, and update all the existing users. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
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- 07 Jan, 2019 3 commits
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Deepak Pandey authored
This patch removes the dependency of the N1SDP on soc css defines in order to let the N1SDP platform port define the uart related constants. Change-Id: If13796f278586a01512ee99615502b30e478189e Signed-off-by: Deepak Pandey <Deepak.Pandey@arm.com>
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Sandrine Bailleux authored
The top level makefile defines the PLAT variable, not PLATFORM. This mistake was causing an empty variable expansion and showing an incomplete error message. Change-Id: I5da1275c73c61a7c1823643a76300f255841719d Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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Soby Mathew authored
The patch SHA 55cf015c enabled PIE support when RESET_TO_BL31=1 for all ARM platforms. But it seems n1sdp platform doesn't work with PIE support yet. Hence restrict the ENABLE_PIE=1 to fvp platform. Change-Id: If44e42528e4b0b57c69084503f346576fe0748bd Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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- 04 Jan, 2019 1 commit
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Antonio Nino Diaz authored
Enforce full include path for includes. Deprecate old paths. The following folders inside include/lib have been left unchanged: - include/lib/cpus/${ARCH} - include/lib/el3_runtime/${ARCH} The reason for this change is that having a global namespace for includes isn't a good idea. It defeats one of the advantages of having folders and it introduces problems that are sometimes subtle (because you may not know the header you are actually including if there are two of them). For example, this patch had to be created because two headers were called the same way: e0ea0928 ("Fix gpio includes of mt8173 platform to avoid collision."). More recently, this patch has had similar problems: 46f9b2c3 ("drivers: add tzc380 support"). This problem was introduced in commit 4ecca339 ("Move include and source files to logical locations"). At that time, there weren't too many headers so it wasn't a real issue. However, time has shown that this creates problems. Platforms that want to preserve the way they include headers may add the removed paths to PLAT_INCLUDES, but this is discouraged. Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 18 Dec, 2018 1 commit
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Sathees Balya authored
This patch allows platforms to define their own jump table list for library at ROM. The file has the list of functions to be used from library at ROM. It can also include other list files. Change-Id: I721c35d7dad3dcadbb3a7f3277bfd5d3e1f6e00a Signed-off-by: Sathees Balya <sathees.balya@arm.com>
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- 11 Dec, 2018 3 commits
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Antonio Nino Diaz authored
Change-Id: Ib7c2529b85bb5930d44907edfc8ead13d3b1ef4d Co-authored-by: Sandrine Bailleux <sandrine.bailleux@arm.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
SPM needs to map a number of regions on behalf of the secure partition. Previously, it used to get a list of them from platform code using the plat_get_secure_partition_mmap() API. Now it gets them from the resource description structure. The SPM<->SP shared buffer is mapped dynamically at EL3. This buffer is used to pass information between SPM and SP, so it must be mapped at EL3 as well in order to be used by SPM. Dynamic translation tables have been enabled when the Trusted Firmware is compiled with SPM support. Change-Id: I64ad335e931661812a0a60558e60372e1e5e6b72 Co-authored-by: Sandrine Bailleux <sandrine.bailleux@arm.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Load SP and RD from package instead of relying on RD being already loaded in memory and the SP being loaded as a BL32 image. Change-Id: I18d4fbf4597656c6a7e878e1d7c01a8a324f3f8a Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 10 Dec, 2018 3 commits
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Antonio Nino Diaz authored
This information is retrieved from the resource description now. Change-Id: Iaae23945eb2c45305cdc6442853e42f4e04fe094 Co-authored-by: Sandrine Bailleux <sandrine.bailleux@arm.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
This information is defined by the Secure Partition in the resource description. Change-Id: Ia7db90c5de8360a596106880d3f6a632a88d3ea8 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Change-Id: Iec265dc85d44f35048d1fbcfbe55960d45570027 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 06 Dec, 2018 1 commit
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Chandni Cherukuri authored
SGI-Clark.Helios platform is similar to SGI-Clark.Ares platform. The difference between these two platforms is the CPU type and the number of CPUs. Add the base support for SGI-Clark.Helios platform. Change-Id: I2b04cb3fb953907848b4fab016e3648899ca4256 Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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- 05 Dec, 2018 1 commit
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Chandni Cherukuri authored
With the two new APIs 'plat_arm_sgi_get_platform_id' and 'plat_arm_sgi_get_config_id' that are available now, BL31 need not depend on hw_config device tree to identify the platform. In addition to this, the existing hardware description in hw_config can be limited to use by BL33 and not by the operating system. So the hardware description from hw_config dts can be moved into nt_fw_config dts and the use of hw_config dts can be removed. Change-Id: I873b7e1e72823d3ec5d253a848e85ae724f09e49 Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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- 03 Dec, 2018 1 commit
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Chandni Cherukuri authored
Add two new functions 'plat_arm_sgi_get_platform_id' and 'plat_arm_sgi_get_config_id' which will be implemented by all the SGI platforms. These functions can be used to determine the part number and configuration id of the SGI platforms. In BL2, these functions are used to populate the 'system-id' node. In BL31, these functions are used to populate the 'sgi_plat_info_t' structure with the part number and configuration id of the platform. Change-Id: I3bacda933527724a3b4074ad4ed5b53a81ea4689 Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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- 29 Nov, 2018 1 commit
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Chandni Cherukuri authored
In order to allow Arm platforms to override the default list of PSCI callbacks, remove the existing weak implementation of 'plat_arm_psci_override_pm_ops' function and let all the Arm platforms implement their own 'plat_arm_psci_override_pm_ops' function. For platforms that support SCMI protocol, the function 'css_scmi_override_pm_ops' can be additionally used as well to override the default PSCI callbacks. Change-Id: If7c27468bd51a00ea9c2a3716b5894163f5a9f3c Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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- 27 Nov, 2018 2 commits
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Chandni Cherukuri authored
For platforms with multi-threaded CPUs, the number of power domains supported would be more than the value currently defined by PLAT_MAX_PWR_LVL. So move the PLAT_MAX_PWR_LVL macro to platform specific code and let the platform define the number of power domain levels. Change-Id: I21c0682e62b397860b2999031a0c9c5ce0d28eed Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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Chandni Cherukuri authored
The CSS_SYSTEM_PWR_DMN_LVL macro that defines the system power domain level is fixed at ARM_PWR_LVL2 for all CSS platforms. However, the system power domain level can be different for CSS platforms that use multi-threaded CPUs. So, in preparation towards adding support for platforms that use multi-threaded CPUs, refactor the definition of CSS_SYSTEM_PWR_DMN_LVL such that CSS_SYSTEM_PWR_DMN_LVL is uniquely defined for each of the CSS platform. Change-Id: Ia837b13f6865e71da01780993c048b45b7f36d85 Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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- 23 Nov, 2018 1 commit
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Sathees Balya authored
This patch adds support to build a combined BL1 and ROMLIB binary file with the right page alignment in Juno. When USE_ROMLIB=1 is set for Juno, it generates the combined file bl1_romlib.bin which needs to be used instead of bl1.bin Change-Id: I407efbe48d3e522fa6ef855538a9587193cb1919 Signed-off-by: Sathees Balya <sathees.balya@arm.com>
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- 21 Nov, 2018 1 commit
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Vijayenthiran Subramaniam authored
Remove the platform common plat_arm_security_setup function to allow platform specific implementations of the security setup function implemented in the board directory of the platform. For use by secure software, configure region0 of DMC-620 trustzone controller to protect the upper 16MB of memory of the first DRAM block from non-secure accesses. Change-Id: I9a8c19656702c4fa4f6917b3655b692d443bb568 Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
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- 14 Nov, 2018 1 commit
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Sughosh Ganu authored
Register a priority level, PLAT_SP_PRI, for secure partition with EL3 exception handling framework(ehf) module. The secure partition manager(SPM) would raise the core's priority to PLAT_SP_PRI before entering the secure partition, to protect the core from getting interrupted while in secure partition. Change-Id: I686897f052a4371e0efa9b929c07d3ad77249e95 Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
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