- 03 Jun, 2021 3 commits
-
-
Yann Gautier authored
The io_dummy code and function calls are only used in case BL32 is TF-A SP_min, and not OP-TEE. This code in bl2_io_storage can then be put under #ifndef AARCH32_SP_OPTEE. Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Change-Id: I52787a775160b335f97547203f653419621f5147
-
Yann Gautier authored
STM32MP1 does not use BL1, the loading of BL2 is done by ROM code. It is then useless to have an entry BL2_IMAGE_ID in the policies. Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Change-Id: I464cedf588114d60522433123f8dbef32ae36818
-
Yann Gautier authored
OPTEE_PAGER defines are renamed OPTEE_CORE. Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Change-Id: I4c28d3b0a6ed843088a3ef06e3e348ce689fabde
-
- 29 Apr, 2021 1 commit
-
-
Yann Gautier authored
To compare the "okay" string of a property, strncmp is used but with the length given by fdt_getprop. This len value is reported as tainted by Coverity [1]. We just can use strlen("okay") which is a known value to compare the 2 strings. [1] https://scan4.coverity.com/reports.htm#v51972/p11439/fileInstanceId=96515154&defectInstanceId=14219121&mergedDefectId=342997 Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Change-Id: Ic8fb6ccf3126a37df615e433eb028861812015da
-
- 08 Apr, 2021 1 commit
-
-
Yann Gautier authored
Create a dedicated static struct mmc_device_info mmc_info mmc_info instead of having this in stack. A boot issue has been seen on some platform when applying patch [1]. [1] 13f3c516 ("mmc:prevent accessing to the released space in case of wrong usage") Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Change-Id: I73a079715253699d903721c865d6470d58f6bd30
-
- 13 Oct, 2020 1 commit
-
-
Yann Gautier authored
Retrieve peripheral base address from a define instead of parsing the device tree. The goal is to improve execution time. Signed-off-by: Pascal Paillet <p.paillet@st.com> Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: I2588c53ad3d4abcc3d7fe156458434a7940dd72b
-
- 08 Jul, 2020 3 commits
-
-
Etienne Carriere authored
Introduce helper functions stm32mp_register_secure_gpio() and stm32mp_register_non_secure_gpio() for drivers to register a GPIO pin as secure or non-secure. These functions are stubbed when shared resource driver is not embedded in the BL image so that drivers do not bother whether they shall register or not their resources. Change-Id: I1fe98576c072ae31f75427c9ac5c9f6c4f1b6ed1 Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
-
Etienne Carriere authored
Introduce helper functions stm32mp_register_secure_periph_iomem() and stm32mp_register_non_secure_periph_iomem() for drivers to register a resource as secure or non-secure based on its SoC interface registers base address. These functions are stubbed when shared resources driver is not embedded (!STM32MP_SHARED_RESOURCES) so that drivers embedded in other BL stages do not bother whether they shall register or not their resources. Change-Id: Icebd05a930afc5964bc4677357da5d1b23666066 Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
-
Etienne Carriere authored
Define helper functions stm32mp_register_secure_periph() and stm32mp_register_non_secure_periph() for platform drivers to register a shared resource assigned to respectively secure or non-secure world. Some resources are related to clock resources. When a resource is registered as secure, ensure its clock dependencies are also registered as secure. Registering a non-secure resource does not mandate its clock dependencies are also registered as non-secure. Change-Id: I74975be8976b8d3bf18dcc807541a072803af6e3 Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
-
- 23 Jun, 2020 2 commits
-
-
Etienne Carriere authored
BL32/SP_MIN configures platform security hardening from the shared resources driver. At the end of SP_MIN initialization, all shared resources shall be assigned to secure or non-secure world by drivers. A lock prevent from further change on the resource assignation. By definition, resources not registered are assign to non-secure world since not claimed by any component on the BL. No functional change as all resources are currently in state SHRES_UNREGISTERED hence assigned to non-secure world as prior this change in stm32mp1_etzpc_early_setup() and sp_min_platform_setup(). Change-Id: Ic41fab47216c3b8b7a6a75b8358cfcec411ed941 Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
-
Etienne Carriere authored
STM32MP1 SoC includes peripheral interfaces that can be assigned to the secure world, or that can be opened to the non-secure world. This change introduces the basics of a driver that manages such resources which assignation is done at run time. It currently offers API functions that state whether a service exposed to non-secure world has permission to access a targeted clock or reset controller. Change-Id: Iff20028f41586bc501085488c03546ffe31046d8 Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
-
- 11 May, 2020 2 commits
-
-
Etienne Carriere authored
New helper functions to get GPIO banks configuration from the FDT. stm32_get_gpio_bank_pinctrl_node() allows stm32mp platforms to differentiate specific GPIO banks when these are defined with a specific path in the FDT. fdt_get_gpio_bank_pin_count() returns the number of pins in a GPIO bank as it depends on the SoC variant. Change-Id: I4481774152b3c6bf35bf986f58e357c2f9c19176 Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
-
Etienne Carriere authored
Relation between GPIO banks and their base address and offset address if platform dependent. This change moves helper functions stm32_get_gpio_bank_base() and stm32_get_gpio_bank_offset() from plat/st/common to plat/st/stm32mp1/. Change-Id: Id3d03e585746aa5509c6fab7d88183a92d561e3f Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
-
- 05 May, 2020 2 commits
-
-
Andre Przywara authored
Now that we have an implementation for getting the node offset of the stdout-path property in the generic fdt_wrappers code, use that to replace the current ST platform specific implementation. Change-Id: I5dd05684e7ca3cb563b5f71c885e1066393e057e Signed-off-by: Andre Przywara <andre.przywara@arm.com>
-
Andre Przywara authored
The STM32 platform port parse DT nodes to find base address to peripherals. It does this by using its own implementation, even though this functionality is generic and actually widely useful outside of the STM32 code. Re-implement fdt_get_reg_props_by_name() on top of the newly introduced fdt_get_reg_props_by_index() function, and move it to fdt_wrapper.c. This is removes the assumption that #address-cells and #size-cells are always one. Change-Id: I6d584930262c732b6e0356d98aea50b2654f789d Signed-off-by: Andre Przywara <andre.przywara@arm.com>
-
- 29 Apr, 2020 1 commit
-
-
Andre Przywara authored
The STM32 platform code uses its own set of FDT helper functions, although some of them are fairly generic. Remove the implementation of fdt_read_uint32_default() and implement it on top of the newly introduced fdt_read_uint32() function, then convert all users over. This also fixes two callers, which were slightly abusing the "default" semantic. Change-Id: I570533362b4846e58dd797a92347de3e0e5abb75 Signed-off-by: Andre Przywara <andre.przywara@arm.com>
-
- 28 Apr, 2020 1 commit
-
-
Andre Przywara authored
The device tree parsing code for the STM32 platform is using its own FDT helper functions, some of them being rather generic. In particular the existing fdt_read_uint32_array() implementation is now almost identical to the new generic code in fdt_wrappers.c, so we can remove the ST specific version and adjust the existing callers. Compared to the original ST implementation the new version takes a pointer to the DTB as the first argument, and also swaps the order of the number of cells and the pointer. Change-Id: Id06b0f1ba4db1ad1f733be40e82c34f46638551a Signed-off-by: Andre Przywara <andre.przywara@arm.com>
-
- 26 Mar, 2020 1 commit
-
-
Yann Gautier authored
A speculative accesses to DDR could be done whereas it was not reachable and could lead to bus stall. To correct this the dynamic mapping in MMU is used. A first mapping is done for DDR tests with MT_NON_CACHEABLE attribute, once DDR access is setup. It is then unmapped and a new mapping DDR is done with cacheable attribute (through MT_MEMORY) to speed-up BL33 (or OP-TEE) load. The disabling of cache during DDR tests is also removed, as now useless. A call to new functions stm32mp_{,un}map_ddr_non_cacheable() is done instead. PLAT_XLAT_TABLES_DYNAMIC is activated globally as used in BL2 and BL32. BL33 max size is also updated to take into account the secure and shared memory areas. Those are used in OP-TEE case. Change-Id: I22c48b4a48255ee264991c34ecbb15bfe87e67c3 Signed-off-by: Yann Gautier <yann.gautier@st.com>
-
- 23 Mar, 2020 2 commits
-
-
Yann Gautier authored
This warning was issued by cppcheck in our downstream code: [plat/st/common/stm32mp_dt.c:629] -> [plat/st/common/stm32mp_dt.c:634]: (warning) Identical condition 'node<0', second condition is always false The second test has to check variable pwr_regulators_node. Change-Id: I4a20c4a3ac0ef0639c2df36309d90a61c02b511f Signed-off-by: Yann Gautier <yann.gautier@st.com>
-
Yann Gautier authored
Correct the following sparse warnings: plat/st/common/stm32mp_dt.c:103:5: warning: symbol 'fdt_get_node_parent_address_cells' was not declared. Should it be static? plat/st/common/stm32mp_dt.c:123:5: warning: symbol 'fdt_get_node_parent_size_cells' was not declared. Should it be static? As those 2 functions are only used by assert(), put them under ENABLE_ASSERTIONS flag. Change-Id: Iad721f12128df83a3de3f53e7920a9c1dce64c56 Signed-off-by: Yann Gautier <yann.gautier@st.com>
-
- 20 Jan, 2020 5 commits
-
-
Lionel Debieve authored
STM32MP1 platform is able to boot from SPI-NOR devices. These modifications add this support using the new SPI-NOR framework. Change-Id: I75ff9eba4661f9fb87ce24ced2bacbf8558ebe44 Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
-
Lionel Debieve authored
STM32MP1 platform is able to boot from SPI-NAND devices. These modifications add this support using the new SPI-NAND framework. Change-Id: I0d5448bdc4bde153c1209e8043846c0f935ae5ba Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
-
Lionel Debieve authored
STM32MP1 platform is able to boot from raw NAND devices. These modifications add this support using the new raw NAND framework. Change-Id: I9e9c2b03930f98a5ac23f2b6b41945bef43e5043 Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
-
Lionel Debieve authored
Add a new entry to find register properties by name and include new assert functions to limit address cells to 1 and size cells to 1. Change-Id: Ide59a795a05fb2af36bd07fec15e5a3adf196226 Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
-
Nicolas Le Bayon authored
Adds compilation flags to specify which drivers will be embedded in the generated firmware. Change-Id: Ie9decc89c3f26cf17e7148a3a4cf337fd35940f7 Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
-
- 03 Oct, 2019 1 commit
-
-
Lionel Debieve authored
Introduce timeout_init_us/timeout_elapsed() delay tracking with CNTPCT. timeout_init_us(some_timeout_us); returns a reference to detect timeout for the provided microsecond delay value from current time. timeout_elapsed(reference) return true/false whether the reference timeout is elapsed. Cherry picked from OP-TEE implementation [1]. [1] commit 33d30a74502b ("core: timeout detection support") Minor: - Remove stm32mp platform duplicated implementation. - Add new include in marvell ble.mk Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Change-Id: Iaef6d43c11a2e6992fb48efdc674a0552755ad9c
-
- 23 Sep, 2019 1 commit
-
-
Lionel Debieve authored
This commit adds authentication binary support for STM32MP1. It prints the bootrom authentication result if signed image is used and authenticates the next loaded STM32 images. It also enables the dynamic translation table support (PLAT_XLAT_TABLES_DYNAMIC) to use bootrom services. Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Change-Id: Iba706519e0dc6b6fae1f3dd498383351f0f75f51
-
- 20 Sep, 2019 1 commit
-
-
Lionel Debieve authored
This BSEC service is a platform specific service. Implementation moved to the platform part. Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Change-Id: I1f70ed48a446860498ed111acce01187568538c9
-
- 02 Sep, 2019 6 commits
-
-
Yann Gautier authored
This function can be used on several stm32mp devices, it is then moved in plat/st/common/stm32mp_common.c. Change-Id: I862debe39604410f71a9ddc28713026362e9ecda Signed-off-by: Yann Gautier <yann.gautier@st.com>
-
Yann Gautier authored
To use spinlocks, MMU should be enabled, as well as data cache. A common function is created (moved from clock file). It is then used whenever a spinlock has to be taken, in BSEC and clock drivers. Change-Id: I94baed0114a2061ad71bd5287a91bf7f1c6821f6 Signed-off-by: Yann Gautier <yann.gautier@st.com>
-
Yann Gautier authored
Among the variants of STM32MP, the STM32MP151 is a single Cortex-A7 chip. A function is added to check the part number of the SoC. If it corresponds to STM32MP151A or STM32MP151C, then the chip has a single Cortex-A7. Change-Id: Icac2015c5d03ce0bcb8e99bbaf1ec8ada34be49c Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
-
Yann Gautier authored
On STMicroelectronics boards, the board information is stored in OTP. This OTP is described in device tree, in BSEC board_id node. Change-Id: Ieccbdcb048343680faac8dc577b75c67ac106f5b Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
-
Yann Gautier authored
This information is located in DBGMCU registers. Change-Id: I480aa046fed9992e3d9665b1f0520bc4b6cfdf30 Signed-off-by: Yann Gautier <yann.gautier@st.com>
-
Yann Gautier authored
Introduce driver for STM32 IWDG peripheral (Independent Watchdog). It is configured according to device tree content and should be enabled from there. The watchdog is not started by default. It can be started after an HW reset if the dedicated OTP is fused. The watchdog also needs to be frozen if a debugger is attached. This is done by configuring the correct bits in DBGMCU. This configuration is allowed by checking BSEC properties. An increase of BL2 size is also required when adding this new code. Change-Id: Ide7535d717885ce2f9c387cf17afd8b5607f3e7f Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
-
- 17 Jun, 2019 3 commits
-
-
Yann Gautier authored
Do not export function dt_get_stdout_node_offset() that is used only inside stm32mp_dt.c source file. Change-Id: I9dd3dbfab21d42ed81c68723e71fe5a7586dce93 Signed-off-by: Yann Gautier <yann.gautier@st.com>
-
Yann Gautier authored
The system configuration controller is mainly used to manage the compensation cell and other IOs and system related settings. The SYSCFG driver is in charge of configuring masters on the interconnect, IO compensation, low voltage boards, or pull-ups for boot pins. All other configurations should be handled in Linux drivers requiring it. Device tree files are also updated to manage vdd-supply regulator. Change-Id: I10fb513761a7d1f2b7afedca9c723ad9d1bccf42 Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Yann Gautier <yann.gautier@st.com>
-
Yann Gautier authored
GPIOx clocks are specific to each STM32MP platforms. This change moves function stm32_get_gpio_bank_clock() from stm32mp common source files to platform private stm32mp1_private.c source file. Change-Id: I9616c0d3fe4d10af715d6f2d1550c13ab62c829a Signed-off-by: Yann Gautier <yann.gautier@st.com>
-
- 23 Apr, 2019 2 commits
-
-
Yann Gautier authored
Support booting OP-TEE as BL32 boot stage and secure runtime service. OP-TEE executes in internal RAM and uses a secure DDR area to store the pager pagestore. Memory mapping and TZC are configured accordingly prior OP-TEE boot. OP-TEE image is expected in OP-TEE v2 format where a header file describes the effective boot images. This change post processes header file content to get OP-TEE load addresses and set OP-TEE boot arguments. Change-Id: I02ef8b915e4be3e95b27029357d799d70e01cd44 Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
-
Yann Gautier authored
A new static function boot_mmc is created to simplify code maintenance of stm32mp_io_setup. Change-Id: I5c416e567e7e174fb1c2b435925a983c9c55fc40 Signed-off-by: Yann Gautier <yann.gautier@st.com>
-
- 07 Mar, 2019 1 commit
-
-
Yann Gautier authored
The change of the structure highlighted the fact that all fields are not correctly initialized with zeroes. Replace the other memset in the function with zeromem, as it is faster. Change-Id: I27f45a64e34637f79fa519f486bf5936721ef396 Signed-off-by: Yann Gautier <yann.gautier@st.com>
-