- 03 Jun, 2021 1 commit
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Yann Gautier authored
OPTEE_PAGER defines are renamed OPTEE_CORE. Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Change-Id: I4c28d3b0a6ed843088a3ef06e3e348ce689fabde
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- 21 Apr, 2021 2 commits
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Yann Gautier authored
In order to prepare future support of FIP, BL32 (SP_min) is compiled as Position Independent Executable. Change-Id: I15e7cc433fb03e1833002f4fe2eaecb6ed42eb47 Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
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Yann Gautier authored
BL2 size is set to 100kB, and BL32 to 72kB, regardless of OP-TEE or stack protector flags. Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Change-Id: Id7411bd55a4140718d64a647d81037720615fc81
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- 23 Mar, 2021 2 commits
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Yann Gautier authored
TZC400 is configured to raise an interrupt in case of faulty access. Call the new added tzc400_it_handler, in case this interrupt occurs. Change-Id: Iaf4fa408a8eff99498042e11e2d6177bad39868c Signed-off-by: Yann Gautier <yann.gautier@st.com>
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Yann Gautier authored
On STM32MP15, only filters 0 and 1 are used. Use TZC_400_REGION_ATTR_FILTER_BIT() macro for those 2 filters 0 and 1 instead of U(3). Change-Id: Ibc61823842ade680f59d5b66b8db59b6a30080e4 Signed-off-by: Yann Gautier <yann.gautier@st.com>
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- 22 Jan, 2021 1 commit
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Yann Gautier authored
The base address of UART peripheral should be given in R0, not in R1. Otherwise the console_stm32_core_flush issues an assert message. This issue was highlighted with recent changes in console flush functions. Change-Id: Iead01986fdbbf30ad2fd9fa515a1d2b611b4e591 Signed-off-by: Yann Gautier <yann.gautier@st.com>
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- 20 Jan, 2021 1 commit
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Peng Fan authored
Make the scmi-msg driver reused by others. Signed-off-by: Peng Fan <peng.fan@nxp.com> Change-Id: I5bc35fd4dab70f45c09b8aab65af4209cf23b124
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- 13 Oct, 2020 6 commits
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Yann Gautier authored
The board information values, read in an OTP are never negative, %u is then used instead of %d. Change-Id: I3bc22401fb4d54666ddf56411f75b79aca738492 Signed-off-by: Yann Gautier <yann.gautier@st.com>
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Nicolas Le Bayon authored
Change-Id: I2b702698d6be93da5ac86da1cbc98b3838315a5a Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Yann Gautier <yann.gautier@st.com>
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Lionel Debieve authored
Update to support new part numbers. Add new STM32 MPUs Part = STM32MP151F, STM32MP153F, STM32MP157F, STM32MP151D, STM32MP153D, STM32MP157D The STM32MP1 series is available in 3 different lines which are pin-to-pin compatible: - STM32MP157: Dual Cortex-A7 cores, Cortex-M4 core @ 209 MHz, 3D GPU, DSI display interface and CAN FD - STM32MP153: Dual Cortex-A7 cores, Cortex-M4 core @ 209 MHz and CAN FD - STM32MP151: Single Cortex-A7 core, Cortex-M4 core @ 209 MHz Each line comes with a security option (cryptography & secure boot) & a Cortex-A frequency option : - A Basic + Cortex-A7 @ 650 MHz - C Secure Boot + HW Crypto + Cortex-A7 @ 650 MHz - D Basic + Cortex-A7 @ 800 MHz - F Secure Boot + HW Crypto + Cortex-A7 @ 800 MHz Remove useless variable in stm32mp_is_single_core(). Change-Id: Id30c836af986c6340c91efa8a7ae9480a2827089 Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Signed-off-by: Yann Gautier <yann.gautier@st.com>
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Lionel Debieve authored
Add a new revision of STM32MP15x CPU (Rev.Z). Change-Id: I227dd6d9b3fcc43270015cfb21f60aeb0a8ab658 Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Signed-off-by: Yann Gautier <yann.gautier@st.com>
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Yann Gautier authored
Retrieve peripheral base address from a define instead of parsing the device tree. The goal is to improve execution time. Signed-off-by: Pascal Paillet <p.paillet@st.com> Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: I2588c53ad3d4abcc3d7fe156458434a7940dd72b
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Patrick Delaunay authored
Update the board info with the new coding including the finished good variant: Board: MBxxxx Var<CPN>.<FG> Rev.<Rev>-<BOM> The OTP 59 coding is: bit [31:16] (hex) => MBxxxx bit [15:12] (dec) => Variant CPN (1....15) bit [11:8] (dec) => Revision board (index with A = 1, Z = 26) bit [7:4] (dec) => Variant FG : finished good (NEW) bit [3:0] (dec) => BOM (01, .... 255) Change-Id: I4fbc0c84596419d1bc30d166311444ece1d9123f Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Yann Gautier <yann.gautier@st.com>
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- 09 Oct, 2020 7 commits
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Jimmy Brisson authored
And from crash_console_flush. We ignore the error information return by console_flush in _every_ place where we call it, and casting the return type to void does not work around the MISRA violation that this causes. Instead, we collect the error information from the driver (to avoid changing that API), and don't return it to the caller. Change-Id: I1e35afe01764d5c8f0efd04f8949d333ffb688c1 Signed-off-by: Jimmy Brisson <jimmy.brisson@arm.com>
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Yann Gautier authored
Remove some useless extra tabs or spaces. Replace some spaces with tabs. Change-Id: I0e8e2a1a1be7a1109ba7f3e3ae35e3fe1b5b4552 Signed-off-by: Yann Gautier <yann.gautier@st.com>
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Yann Gautier authored
In heavy parallel builds, it has sometimes been seen issues with the tool not generated before it was needed. Change some rules order and dependency to solve that. Change-Id: I8f4b4f46a2ea0fe496bc66bca47c66d1c81d3c99 Signed-off-by: Yann Gautier <yann.gautier@st.com>
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Yann Gautier authored
There were fixed values when computing PLAT_PARTITION_MAX_ENTRIES. Use STM32_BL33_PARTS_NUM and STM32_RUNTIME_PARTS_NUM. The first one is for the number of copies of BL33. The second one depends on the use case SP_min or OP-TEE. For OP-TEE, there are 3 partitions. For SP_min, as it is in the same binary as BL2, it is set to 0. It will be set to 1 if BL32 is in a separate binary. Change-Id: Iba4d8ec5fbc713bebfbdcd9f9426c3fded20d3ad Signed-off-by: Yann Gautier <yann.gautier@st.com>
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Yann Gautier authored
First put Makefile variables definition, then definitions for each feature, then C flags, then source files, then compilation rules. Change-Id: I238115ea2fe4ebafccd2135979814c27932c34e2 Signed-off-by: Yann Gautier <yann.gautier@st.com>
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Yann Gautier authored
To simplify the rule that creates the concatenated binary, use ASFLAGS instead of adding all paths in the AS command line. This allows a better management if a binary is not present. Change-Id: Ic8b4566e7dedc6f55be355a92e3b214cef138d9b Signed-off-by: Yann Gautier <yann.gautier@st.com>
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Yann Gautier authored
The previous proprietary version was not correctly handling dependencies. Using MAKE_LD from make_helpers files now correctly handles that. The generated linker script is the same as before. Change-Id: Iccfd8dc3fffa7a33e73b184b72e0dfd5d26bc9c9 Signed-off-by: Yann Gautier <yann.gautier@st.com>
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- 24 Sep, 2020 1 commit
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Yann Gautier authored
There is one dtsi file per SoC version: - STM32MP151: common part for all version, Single Cortex-A7 - STM32MP153: Dual Cortex-A7 - STM32MP157: + GPU and DSI, but not needed for TF-A The STM32MP15xC include a cryptography peripheral, add it in a dedicated file. There are 4 packages available, for which the IOs number change. Have one file for each package. The 2 packages AB and AD are added. STM32157A-DK1 and STM32MP157C-DK2 share most of their features, a common dkx file is then created. Some reordering is done in other files, and realign with kernel DT files. The DDR files are generated with our internal tool, no changes in the registers values. Change-Id: I9f2ef00306310abe34b94c2f10fc7a77a10493d1 Signed-off-by: Yann Gautier <yann.gautier@st.com>
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- 21 Sep, 2020 3 commits
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Yann Gautier authored
If GPIO port for UART TX is less than 8, the register GPIO_AFRL should be used to set the alternate. GPIO_AFRH is used if GPIO port is greater or equal to 8. The macro GPIO_TX_ALT_SHIFT is removed and the GPIO port number is tested against GPIO_ALT_LOWER_LIMIT (=8) in plat_crash_console_init() function. Change-Id: Ibb62223ed6bce589bbcab59a5e986b2677e6d118 Signed-off-by: Yann Gautier <yann.gautier@st.com>
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Yann Gautier authored
The STM32MP1 implementation of this function will call plat_report_exception(). It displays more information about the panic if DEBUG is enabled. The LR register is also filled with R6 content, which hold the faulty address. This allows debugger to reconstruct the backtrace. Change-Id: I6710e8e2ab6658b05c5bbad2f3c545f07f355afb Signed-off-by: Yann Gautier <yann.gautier@st.com>
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Yann Gautier authored
In case DEBUG is enabled, plat_report_exception will now display extra information of the cause of the exception. Change-Id: I72cc9d180959cbf31c13821dd051eaf4462b733e Signed-off-by: Yann Gautier <yann.gautier@st.com>
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- 14 Sep, 2020 1 commit
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Leonardo Sandoval authored
Loop macros make it easier for developers to include new variables to assert or define and also help code code readability on makefiles. Change-Id: I0d21d6e67b3eca8976c4d856ac8ccc02c8bb5ffa Signed-off-by: Leonardo Sandoval <leonardo.sandoval@linaro.org>
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- 14 Aug, 2020 1 commit
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Yann Gautier authored
Include the GICv2 makefile in STM32MP1 SP_min makefile, and use ${GICV2_SOURCES} instead of taking drivers/arm/gic files directly. Change-Id: Ibcaed5b0bd17f6d8cf200e208c11cc10cd6d2ee5 Signed-off-by: Yann Gautier <yann.gautier@st.com>
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- 16 Jul, 2020 1 commit
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Etienne Carriere authored
This change implements platform services for stm32mp1 to expose clock and reset controllers over SCMI clock and reset domain protocols in sp_min firmware. Requests execution use a fastcall SMC context using a SiP function ID. The setup allows the create SCMI channels by assigning a specific SiP SMC function ID for each channel/agent identifier defined. In this change, stm32mp1 exposes a single channel and hence expects single agent at a time. The input payload in copied in secure memory before the message in passed through the SCMI server drivers. BL32/sp_min is invoked for a single SCMI message processing and always returns with a synchronous response message passed back to the caller agent. This change fixes and updates STM32_COMMON_SIP_NUM_CALLS that was previously wrongly set 4 whereas only 1 SiP SMC function ID was to be counted. STM32_COMMON_SIP_NUM_CALLS is now set to 3 since the 2 added SiP SMC function IDs for SCMI services. Change-Id: Icb428775856b9aec00538172aea4cf11e609b033 Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
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- 08 Jul, 2020 6 commits
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Etienne Carriere authored
Introduce helper functions stm32mp_register_secure_gpio() and stm32mp_register_non_secure_gpio() for drivers to register a GPIO pin as secure or non-secure. These functions are stubbed when shared resource driver is not embedded in the BL image so that drivers do not bother whether they shall register or not their resources. Change-Id: I1fe98576c072ae31f75427c9ac5c9f6c4f1b6ed1 Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
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Etienne Carriere authored
Introduce helper functions stm32mp_register_secure_periph_iomem() and stm32mp_register_non_secure_periph_iomem() for drivers to register a resource as secure or non-secure based on its SoC interface registers base address. These functions are stubbed when shared resources driver is not embedded (!STM32MP_SHARED_RESOURCES) so that drivers embedded in other BL stages do not bother whether they shall register or not their resources. Change-Id: Icebd05a930afc5964bc4677357da5d1b23666066 Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
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Etienne Carriere authored
Update implementation of stm32mp_nsec_can_access_reset() based on the registering of the shared resources. Querying registering state locks further registration of peripherals. Change-Id: I5f38f2a3481780b9a71939d95984c4821c537aa4 Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
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Etienne Carriere authored
Update implementation of stm32mp_nsec_can_access_clock() based on the registering of the shared resources. Querying registering state locks further registration of peripherals. Change-Id: If68f6d4a52c4742ba66244c6ea2d9afa08404137 Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
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Etienne Carriere authored
Define helper functions stm32mp_register_secure_periph() and stm32mp_register_non_secure_periph() for platform drivers to register a shared resource assigned to respectively secure or non-secure world. Some resources are related to clock resources. When a resource is registered as secure, ensure its clock dependencies are also registered as secure. Registering a non-secure resource does not mandate its clock dependencies are also registered as non-secure. Change-Id: I74975be8976b8d3bf18dcc807541a072803af6e3 Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
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Etienne Carriere authored
Define from helper functions to get a human readable string identifier from a shared resource enumerated ID. Use them to make debug traces more friendly peripheral registering functions. Change-Id: I9e207b8ce1d1e9250e242ca7e15461b9a1532f40 Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
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- 23 Jun, 2020 7 commits
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Etienne Carriere authored
Embed Arch Architecture SMCCC services in stm32mp1 SP_MIN. This service is needed by Linux kernel to setup the SMCCC conduit used by its SCMI SMC transport driver. Change-Id: I454a7ef3048a77ab73fff945e8115b60445d5841 Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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Etienne Carriere authored
SCMI shared memory is used to exchange message payloads between secure SCMI services and non-secure SCMI agents. It is mapped uncached (device) mainly to conform to existing support in the Linux kernel. Note that executive messages are mostly short (few 32bit words) hence not using cache will not penalize much performances. Platform stm32mp1 shall configure ETZPC to harden properly the secure and non-secure areas of the SYSRAM address space, that before CPU accesses the shared memory when mapped non-secure. This change defines STM32MP_SEC_SYSRAM_BASE/STM32MP_SEC_SYSRAM_SIZE and STM32MP_NS_SYSRAM_BASE/STM32MP_NS_SYSRAM_SIZE. Change-Id: I71ff02a359b9668ae1c5a71b5f102cf3d310f289 Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
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Etienne Carriere authored
When using SP_min as monitor, only sp_min_warm_entrypoint() is a valid secure entry point. Change-Id: I440cec798e901b11a34dd482c33b2e378a8328ab Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@st.com>
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Etienne Carriere authored
Disable use of Neon VFP support for platform stm32mp1 when building with SP_MIN runtime services as these can conflict with non-secure world use of NEON support. This is preferred over a systematic backup/restore of NEON context when switching between non-secure and secure worlds. When NEON support is disabled, this is done for both BL2 and BL32 as build process uses common libraries built once for both binaries. Change-Id: I4e8808dcb6ef58fc839e6f85fd6e45cfbaa34be0 Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
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Etienne Carriere authored
BL32/SP_MIN configures platform security hardening from the shared resources driver. At the end of SP_MIN initialization, all shared resources shall be assigned to secure or non-secure world by drivers. A lock prevent from further change on the resource assignation. By definition, resources not registered are assign to non-secure world since not claimed by any component on the BL. No functional change as all resources are currently in state SHRES_UNREGISTERED hence assigned to non-secure world as prior this change in stm32mp1_etzpc_early_setup() and sp_min_platform_setup(). Change-Id: Ic41fab47216c3b8b7a6a75b8358cfcec411ed941 Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
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Etienne Carriere authored
Get number of pins in the GPIOZ bank with helper function fdt_get_gpio_bank_pin_count(). Save the value in RAM to prevent parsing the FDT several time for the same information. Change-Id: Ie68e300804461ffce09914100a7d2962116023b5 Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
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Etienne Carriere authored
Define enum stm32mp_shres for platform stm32mp1. The enumerated type defines all resources that can be assigned to secure or non-secure worlds at run time for the platform. Change-Id: I5de20d72735856645f1efd0993643278e8d35bcb Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
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