- 02 Feb, 2021 4 commits
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Pali Rohár authored
Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I192acab2a7f42cd80069faeac2d7823a05558dc6
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Pali Rohár authored
Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I5310c30051703bbf9f377762a00eb6a8188c6fa1
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Pali Rohár authored
Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I96c2d9d5bc6c69a1a66a29bf586a23375d63ab5a
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Pali Rohár authored
Reformat list of boards, remove unsupported OcteonTX2 and mention supported Turris MOX board. Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I22cea7f77fd078554c7f0ed4108781626209e563
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- 21 Jan, 2021 1 commit
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David Horstmann authored
Fix some typos and misspellings in TF-A documentation. Signed-off-by: David Horstmann <david.horstmann@arm.com> Change-Id: Id72553ce7b2f0bed9821604fbc8df4d4949909fa
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- 14 Jan, 2021 1 commit
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Luka Kovacic authored
The supported MARVELL_PLATFORM list is updated to include the recently added a80x0_puzzle platform (IEI Puzzle-M801). Additionally building instructions are added for the GST ESPRESSObin-Ultra board (1 GB, DDR4 RAM variant), which has been tested successfully and booted TF-A on the board. Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr> Change-Id: Ie5724df27c1ee2e8f6a52664520579e872471e93
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- 05 Jan, 2021 1 commit
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Marek Behún authored
Introduce a new build option CM3_SYSTEM_RESET for A3700 platform, which, when enabled, adds code to the PSCI reset handler to try to do system reset by the WTMI firmware running on the Cortex-M3 secure coprocessor. (This function is exposed via the mailbox interface.) The reason is that the Turris MOX board has a HW bug which causes reset to hang unpredictably. This issue can be solved by putting the board in a specific state before reset. Signed-off-by: Marek Behún <marek.behun@nic.cz> Change-Id: I3f60b9f244f334adcd33d6db6a361fbc8b8d209f
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- 19 Nov, 2020 1 commit
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Pali Rohár authored
Also add example how to build TF-A for A3720 Turris MOX board and also fix style/indentation issues and information about default values. Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I2dc957307b1b627b403a8d960e85f5ac9e15aee5
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- 11 Oct, 2020 1 commit
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Pali Rohár authored
Add information about 2GB variant of EspressoBin V5 and use Marvell git branches which contain required fixes for EspressoBin. Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I1db510f1576f4762259ad7b0c10024b8ab434a59
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- 04 Oct, 2020 1 commit
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Marcin Wojtas authored
Now that the BLE image sources (mv_ddr) are updated, reflect the proper branch in the Armada build howto. Change-Id: I959d1343d0dfdd681c7e39bdcaed9b36aaddfca1 Signed-off-by: Marcin Wojtas <mw@semihalf.com>
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- 30 Jul, 2020 3 commits
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Grzegorz Jaszczyk authored
The purpose of rx_training had changed after last update. Currently it is not supposed to help with providing static parameters for porting layer. Instead, it aims to suit the parameters per connection. Change-Id: I2a146b71e2e20bd264c090a9a627d0b6bc56e052 Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
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Grzegorz Jaszczyk authored
Change-Id: I0cebbaa900aa518700f13cbf02f8a97e0c76b21c Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
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Konstantin Porotchkin authored
Add references to the OcteonTX2 CN913x family. Change-Id: I172a8e3d061086bf4843acad014c113c80359e01 Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
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- 10 Jul, 2020 1 commit
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Konstantin Porotchkin authored
The LLC SRAM will be enabled in OP-TEE OS for usage as secure storage. The CCU have to prepare SRAM window, but point to the DRAM-0 target until the SRAM is actually enabled. This patch changes CCU SRAM window target to DRAM-0 Remove dependence between LLC_SRAM and LLC_ENABLE and update the build documentation. The SRAМ base moved to follow the OP-TEE SHMEM area (0x05400000) Change-Id: I85c2434a3d515ec37da5ae8eb729e3280f91c456 Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
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- 19 Jun, 2020 1 commit
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Konstantin Porotchkin authored
Add llc_sram_enable() and llc_sram_disable() APIs to Marvell cache_lls driver. Add LLC_SRAM definition to Marvell common makefile - disabled by the default. Add description of LLC_SRAM flag to the build documentation. Change-Id: Ib348e09752ce1206d29268ef96c9018b781db182 Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
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- 06 Jun, 2020 2 commits
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Alex Leibovich authored
This commit introduces 32-bit DDR topology map initialization. For that purpose a new DDR32 build flag is added, with according documentation update. Change-Id: I169ff358c2923afd984e27bc126dc551dcaefc01 Signed-off-by: Alex Leibovich <alexl@marvell.com>
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Grzegorz Jaszczyk authored
This commit is a preparation for upcoming support for OcteonTX and OcteonTX2 product families. Armada platform related files (docs, plat, include/plat) are moved to the new "armada" sub-folder. Change-Id: Icf03356187078ad6a2e56c9870992be3ca4c9655 Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
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